The EFF launches a router project

Posted Jul 30, 2014 2:26 UTC (Wed) by mtaht (subscriber, #11087)
In reply to: The EFF launches a router project by arnd
Parent article: The EFF launches a router project

my benchmarks show the perceived benefits of the mips 74k cpu to be mostly illusion. To get roughly 2x more performance on simplistic benchmarks, it has a much deeper instruction pipeline, but usually has the same cache sizes as prior chips. (32K/32K). So you have worse interrupt response time, and not enough cache to do more stuff, both of which are critical things needed in a router.

An advantage of the arm chips is they generally have a L2 cache that is worthwhile and shorter pipelines. And Intel did some great things with ivy bridge direct to cache dma interface and their DLPK system that I wish the lower end routers could duplicate...

Personally I'm in love with the parallella right now (if only the 16 core co processor was more of an I/O co-processor) and its dual A9 core AND FPGA.... got enough gates to do http://jvimal.github.io/senic/ and maybe fq_codel too...

The EFF launches a router project

Posted Jul 31, 2014 14:58 UTC (Thu) by jhhaller (guest, #56103) [Link] (3 responses)

The generic activity (but driven by ARM) comparable to the Intel DPDK effort is OpenDataPlane. It's not nearly as advanced as DPDK, but may be of interest to OpenWRT and downstream projects.

The EFF launches a router project

Posted Aug 1, 2014 4:21 UTC (Fri) by mtaht (subscriber, #11087) [Link] (2 responses)

cool, thanks, good to know! The kind of numbers that intel gets out of their SDK are *amazing* - and I wasn't aware that there was a similar effort on arm. The thing is, intel gets those numbers by having DMA direct to their very large caches, which arm chips generally lack.

I keep hoping someone writing hardware will make note of all the advancements in queue theory of late and make better ethernet chips (or, in arm's case, verilog or VHDL IP).

The EFF launches a router project

Posted Aug 1, 2014 12:27 UTC (Fri) by arnd (subscriber, #8866) [Link] (1 responses)

My understanding of DPDK and ODP is that they are mostly interested in running proprietary network stacks in user space, in order to implement features there that don't exist in the kernel, but at the same time completely bypassing the kernel and the features that exist in it. The fact that Intel and some others can do DMA into caches is independent of that and you can do that in both kernel and user space based network stacks.

Note that ODP by design requires cache-coherent DMA, which does not necessarily imply doing the DMA into the cache, but it does mean that it is not portable to the typical low-end SoCs you'd find in consumer routers as opposed to the devices that Cisco and Juniper are selling to enterprise customers.

The ArmadaXP chip (used in WRT1900AC) may be an exception to that, so ODP can run on that in theory, but then you still need to program your ODP based application to talk to Marvell's network hardware through ODP.

The EFF launches a router project

Posted Feb 15, 2016 13:13 UTC (Mon) by nysan (guest, #81015) [Link]

"My understanding of DPDK and ODP is that they are mostly interested in running proprietary network stacks in user space, in order to implement features there that don't exist in the kernel, but at the same time completely bypassing the kernel and the features that exist in it. The fact that Intel and some others can do DMA into caches is independent of that and you can do that in both kernel and user space based network stacks."

Have a look at openfastpath on ODP.
Linux is still used as controlplane with --enable-sp, ARP, RIPv2 et.c. is sent to the kernel stack.
Standard cmds "arp", "ip" et.c. are used to configure parts of the stack thats common between both.
Control plane stack state is mirrored via netlink for fast access by packet churning cores, i.e. ARP table, FIB et.c.