The EFF launches a router project

Posted Jul 29, 2014 22:08 UTC (Tue) by arnd (subscriber, #8866)
In reply to: The EFF launches a router project by dlang
Parent article: The EFF launches a router project

WNDR3700v4 has a 74Kc CPU core, so it should be a bit faster than the 24Kc on the 3800, but it won't make a lot of difference in the end, even the QCA9558/MT7620A/BCM4706 as the current high end on MIPS SoCs are probably too limited.

IPQ8064 will have a much faster CPU but the I/O path is as crippled as before by lacking cache-coherent DMA over PCI. Armada XP (from WRT1900AC) should have much higher I/O throughput, but its PJ4B CPU cores are not as fast as the Krait cores used in IPQ8064.

In terms of raw CPU performance, I'd expect doubling speed with each step AR7161->QCA9558->BCM47081->MV78230->IPQ8064, but in practice you see less than that on network transfers because they will all spend a lot of time waiting for I/O to cross the bus.

The EFF launches a router project

Posted Jul 29, 2014 22:17 UTC (Tue) by dlang (guest, #313) [Link] (1 responses)

Well, since there is more processing being done with active queue management, the I/O thoughput isn't the limiting factor.

I've had testing done with the 3800 with a very stripped down kernel (down to disabling connection tracking and all firewalling because it wasn't needed for the application), and the number reported back was that it topped out at 300Mb/sec

The EFF launches a router project

Posted Jul 30, 2014 2:31 UTC (Wed) by mtaht (subscriber, #11087) [Link]

I need to point out there is nearly zero cpu impact of the new queue management stuff, be it aqm or fair queuing. There are even beneficial cache effects from keeping the queues shorter with BQL, also -

the real killer for cpu is the cost software rate limiting, which accounts for like 82% of the overhead before a box flatlines. (I confirm the peak forwarding rate for the wndr3800 appears to be about 330mbit/sec with no iptables rules using fq_codel on the ethernet device, and about 50mbit with software rate limiting)

I'd like to come up with a better rate limiter, and feel that hardware assistance is going to be needed with the current generation of arm router based products as well.

The EFF launches a router project

Posted Jul 30, 2014 2:26 UTC (Wed) by mtaht (subscriber, #11087) [Link] (4 responses)

my benchmarks show the perceived benefits of the mips 74k cpu to be mostly illusion. To get roughly 2x more performance on simplistic benchmarks, it has a much deeper instruction pipeline, but usually has the same cache sizes as prior chips. (32K/32K). So you have worse interrupt response time, and not enough cache to do more stuff, both of which are critical things needed in a router.

An advantage of the arm chips is they generally have a L2 cache that is worthwhile and shorter pipelines. And Intel did some great things with ivy bridge direct to cache dma interface and their DLPK system that I wish the lower end routers could duplicate...

Personally I'm in love with the parallella right now (if only the 16 core co processor was more of an I/O co-processor) and its dual A9 core AND FPGA.... got enough gates to do http://jvimal.github.io/senic/ and maybe fq_codel too...

The EFF launches a router project

Posted Jul 31, 2014 14:58 UTC (Thu) by jhhaller (guest, #56103) [Link] (3 responses)

The generic activity (but driven by ARM) comparable to the Intel DPDK effort is OpenDataPlane. It's not nearly as advanced as DPDK, but may be of interest to OpenWRT and downstream projects.

The EFF launches a router project

Posted Aug 1, 2014 4:21 UTC (Fri) by mtaht (subscriber, #11087) [Link] (2 responses)

cool, thanks, good to know! The kind of numbers that intel gets out of their SDK are *amazing* - and I wasn't aware that there was a similar effort on arm. The thing is, intel gets those numbers by having DMA direct to their very large caches, which arm chips generally lack.

I keep hoping someone writing hardware will make note of all the advancements in queue theory of late and make better ethernet chips (or, in arm's case, verilog or VHDL IP).

The EFF launches a router project

Posted Aug 1, 2014 12:27 UTC (Fri) by arnd (subscriber, #8866) [Link] (1 responses)

My understanding of DPDK and ODP is that they are mostly interested in running proprietary network stacks in user space, in order to implement features there that don't exist in the kernel, but at the same time completely bypassing the kernel and the features that exist in it. The fact that Intel and some others can do DMA into caches is independent of that and you can do that in both kernel and user space based network stacks.

Note that ODP by design requires cache-coherent DMA, which does not necessarily imply doing the DMA into the cache, but it does mean that it is not portable to the typical low-end SoCs you'd find in consumer routers as opposed to the devices that Cisco and Juniper are selling to enterprise customers.

The ArmadaXP chip (used in WRT1900AC) may be an exception to that, so ODP can run on that in theory, but then you still need to program your ODP based application to talk to Marvell's network hardware through ODP.

The EFF launches a router project

Posted Feb 15, 2016 13:13 UTC (Mon) by nysan (guest, #81015) [Link]

"My understanding of DPDK and ODP is that they are mostly interested in running proprietary network stacks in user space, in order to implement features there that don't exist in the kernel, but at the same time completely bypassing the kernel and the features that exist in it. The fact that Intel and some others can do DMA into caches is independent of that and you can do that in both kernel and user space based network stacks."

Have a look at openfastpath on ODP.
Linux is still used as controlplane with --enable-sp, ARP, RIPv2 et.c. is sent to the kernel stack.
Standard cmds "arp", "ip" et.c. are used to configure parts of the stack thats common between both.
Control plane stack state is mirrored via netlink for fast access by packet churning cores, i.e. ARP table, FIB et.c.