A missed invariant
A missed invariant
Posted Sep 4, 2024 19:32 UTC (Wed) by pizza (subscriber, #46)In reply to: A missed invariant by ebiederm
Parent article: Whither the Apple AGX graphics driver?
To paraphrase the Red Queen, hardware has the remarkable ability of triggering six supposedly-impossible situations before breakfast, invariably wrecking your nice clean/consistent/clever abstractions in the process.
(I have no opinion on if that applies to this particular situation...)
Posted Sep 5, 2024 11:22 UTC (Thu)
by taladar (subscriber, #68407)
[Link]
Posted Sep 5, 2024 18:30 UTC (Thu)
by NYKevin (subscriber, #129325)
[Link] (2 responses)
Rust also inherits this model for its atomics, and to my understanding, it takes exactly the same "meh, theory is hard, we'll just assume the implementation is not insane" stance as C++. I like to imagine that some aggressive compiler writer is going to blow past the spec's non-normative "please do not actually do this" note and try to optimize a time machine into C++ and/or Rust, but realistically I think the compiler writers are smart people who understand that this would be a bad idea.
To further explain the motivation: Relaxed atomics are basically the "I don't want the compiler to turn my data race into UB" annotation. They don't actually do anything other than guarantee that the individual operations on that particular variable are atomic and consistent with some sequential ordering, and that the compiler is not allowed to deduce UB from any data races that may result, but other than that, there are no rules. This is intended to allow compilers to just emit loads and stores for simple (read-only or write-only) atomics, since the compiler may reason that any cache incoherency could also be interpreted as some reordering of the parallel loads and stores, and so you don't have to emit a fence. Since the "some" sequential ordering is not required to be consistent with the ordering of any other relaxed atomic variable, you can have two of these variables that interact with one another in such a way that the resulting ordering is permitted to contain a loop or cycle, in which case the results are not well-defined but also are not UB, and now you have rules that permit circular arguments like "x is 37 because x is 37." In C++14, they did add a rule prohibiting some specific cases (including the simple 37-because-37 case), but to the best of my understanding, this is not a comprehensive fix and there are still variations of the behavior that are not forbidden by the spec.
Posted Sep 5, 2024 19:35 UTC (Thu)
by khim (subscriber, #9252)
[Link] (1 responses)
I would say that since Pentium Pro “real CPUs” are a time machines and thus all these paradoxes they speak about have become real Except it does. It even happens on x86, as we all know. And x86 tries harder than most other CPUs to hide it's true nature. The problem here is that creating a memory model that makes some sense and also is compatible with all these optimizations that hardware (not compiler!) is doing… it's not easy. From what I understand C++ (and thus Rust) model is not well aligned with what hardware is doing but what Linux is doing is not compatible with some more exotic targets (e.g. GPUs) thus we just have to agree that designing sensible memory model for atomics is just hard.
Posted Sep 7, 2024 23:18 UTC (Sat)
by NYKevin (subscriber, #129325)
[Link]
A missed invariant
A missed invariant
> real CPUs are usually not time machines
A missed invariant
A missed invariant