EPIC failure (to cancel the project when it was first failing)
EPIC failure (to cancel the project when it was first failing)
Posted Nov 17, 2023 15:44 UTC (Fri) by paulj (subscriber, #341)In reply to: EPIC failure (to cancel the project when it was first failing) by foom
Parent article: The push to save Itanium
If hardware can apply an optimisation, a software JIT should be able to as well. The question must then be:
- Can the transistors (and pipeline depth) saved in hardware then be used to gain performance?
Transmeta did well on power, but was not fast. Which suggests the primary benefit is an increase in performance/watt from the transistor savings - not outright performance. Either that, or Transmeta simply didn't have the resources (design time, expertise) to use the extra transistor budget / simpler pipeline to improve outright performance.