Intel's "redundant prefix issue"
Intel's "redundant prefix issue"
Posted Nov 15, 2023 21:32 UTC (Wed) by pizza (subscriber, #46)In reply to: Intel's "redundant prefix issue" by wtarreau
Parent article: Intel's "redundant prefix issue"
Exactly this. The designs (and implementations) are _extremely_ complex. (though these days it's tens of billions of transistors, with more potential states than there are atoms in our universe)
> it becomes virtually impossible to even document it at all, let alone try to explain how the microcode patches work!
It's not that it's impossible to "document", but effectively impossible to simply _enumerate_ all potential states that might matter, much less _test_ that they work as intended.
Now as far as the microcode itself is concerned, I'd expect it's pretty straightforward to document _how_ the mechanism works in general, but for that to be useful you'd have to effectively expose the entire inner register/API/etc of the processor. And Intel is understandably reluctant to publish those trade secrets.
Posted Nov 16, 2023 4:43 UTC (Thu)
by wtarreau (subscriber, #51152)
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That's what I meant, "impossible to document" implies "without providing the full internal schematics". Of course, in a 10000-page schematics of the whole stuff there certainly are references to bitXXX coming from the patch system. But it's quite different to place bitXXX on the control pin of a mux on a diagram than to document what bitXXX does. I wouldn't be surprised if the doc for the microcode update stuff only enumerates ranges of bits and the associated blocks and pages in the schematics, and that one has to actually search for them directly in the schematics, otherwise the doc would always be outdated or never finished. And that's not counting the risks of errors in that doc itself which can have devastating effects.
Intel's "redundant prefix issue"
