| From: |
| Liang Yang <liang.yang-AT-amlogic.com> |
| To: |
| Neil Armstrong <narmstrong-AT-baylibre.com>, Jerome Brunet <jbrunet-AT-baylibre.com>, Kevin Hilman <khilman-AT-baylibre.com>, Michael Turquette <mturquette-AT-baylibre.com>, Stephen Boyd <sboyd-AT-kernel.org>, Rob Herring <robh+dt-AT-kernel.org>, <linux-clk-AT-vger.kernel.org> |
| Subject: |
| [PATCH v9 0/4] clk: meson: add a sub EMMC clock controller support |
| Date: |
| Thu, 13 Jan 2022 19:57:41 +0800 |
| Message-ID: |
| <20220113115745.45826-1-liang.yang@amlogic.com> |
| Cc: |
| Liang Yang <liang.yang-AT-amlogic.com>, Martin Blumenstingl <martin.blumenstingl-AT-googlemail.com>, Jianxin Pan <jianxin.pan-AT-amlogic.com>, Victor Wan <victor.wan-AT-amlogic.com>, XianWei Zhao <xianwei.zhao-AT-amlogic.com>, Kelvin Zhang <kelvin.zhang-AT-amlogic.com>, BiChao Zheng <bichao.zheng-AT-amlogic.com>, YongHui Yu <yonghui.yu-AT-amlogic.com>, <linux-arm-kernel-AT-lists.infradead.org>, <linux-amlogic-AT-lists.infradead.org>, <linux-kernel-AT-vger.kernel.org>, <devicetree-AT-vger.kernel.org> |
| Archive-link: |
| Article |
Changes since v8 [9]
- use MESON_SCLK_ONE_BASED instead of CLK_DIVIDER_ONE_BASED
- use struct_size to caculate onecell_data
- add clk-phase-delay.h
- define CLK_DELAY_STEP_PS_GX and CLK_DELAY_STEP_PS_AXG
Changes since v7 [8]
- move meson_clk_get_phase_delay_data() from header to driver
- CONFIG sclk-div with COMMON_CLK_AMLOGIC instead of COMMON_CLK_AMLOGIC_AUDIO
- remove onecell date and ID for internal MUX clk
- use helper for functions for ONE_BASED in sclk-div
- add ONE_BASED support for duty cycle
Changes since v6 [7]:
- add one based support for sclk divier
- alloc sclk in probe for multiple instance
- fix coding styles
Changes since v5 [6]:
- remove divider ops with .init and use sclk_div instead
- drop CLK_DIVIDER_ROUND_CLOSEST in mux and div
- drop the useless type cast
Changes since v4 [5]:
- use struct parm in phase delay driver
- remove 0 delay releted part in phase delay driver
- don't rebuild the parent name once again
- add divider ops with .init
Changes since v3 [4]:
- separate clk-phase-delay driver
- replace clk_get_rate() with clk_hw_get_rate()
- collect Rob's R-Y
- drop 'meson-' prefix from compatible string
Changes since v2 [3]:
- squash dt-binding clock-id patch
- update license
- fix alignment
- construct a clk register helper() function
Changes since v1 [2]:
- implement phase clock
- update compatible name
- adjust file name
- divider probe() into small functions, and re-use them
[1] https://lkml.kernel.org/r/20180628090034.0637a062@xps13
[2] https://lkml.kernel.org/r/20180703145716.31860-1-yixun.la...
[3] https://lkml.kernel.org/r/20180710163658.6175-1-yixun.lan...
[4] https://lkml.kernel.org/r/20180712211244.11428-1-yixun.la...
[5] https://lkml.kernel.org/r/20180809070724.11935-4-yixun.la...
[6] https://lkml.kernel.org/r/1539839245-13793-1-git-send-ema...
[7] https://lkml.kernel.org/r/1541089855-19356-1-git-send-ema...
[8] https://lkml.kernel.org/r/1544457877-51301-1-git-send-ema...
[9] https://lkml.kernel.org/r/1545063850-21504-1-git-send-ema...
Liang Yang (4):
clk: meson: add one based divider support for sclk
clk: meson: add emmc sub clock phase delay driver
clk: meson: add DT documentation for emmc clock controller
clk: meson: add sub MMC clock controller driver
.../bindings/clock/amlogic,mmc-clkc.yaml | 64 ++++
drivers/clk/meson/Kconfig | 18 ++
drivers/clk/meson/Makefile | 2 +
drivers/clk/meson/clk-phase-delay.c | 69 ++++
drivers/clk/meson/clk-phase-delay.h | 20 ++
drivers/clk/meson/mmc-clkc.c | 300 ++++++++++++++++++
drivers/clk/meson/sclk-div.c | 61 ++--
drivers/clk/meson/sclk-div.h | 3 +
include/dt-bindings/clock/amlogic,mmc-clkc.h | 14 +
9 files changed, 529 insertions(+), 22 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.yaml
create mode 100644 drivers/clk/meson/clk-phase-delay.c
create mode 100644 drivers/clk/meson/clk-phase-delay.h
create mode 100644 drivers/clk/meson/mmc-clkc.c
create mode 100644 include/dt-bindings/clock/amlogic,mmc-clkc.h
--
2.34.1
