How does CPU state save/restore work with user interrupts?
How does CPU state save/restore work with user interrupts?
Posted Oct 8, 2021 18:57 UTC (Fri) by BenHutchings (subscriber, #37955)In reply to: How does CPU state save/restore work with user interrupts? by tpo
Parent article: User-space interrupts
The receiving thread has to already be running on a different CPU, for the interrupt to be delivered directly. If any context switch is needed, it's mediated by the kernel, unless I've very much misunderstood.
Posted Oct 8, 2021 20:14 UTC (Fri)
by tpo (subscriber, #25713)
[Link]
Nevertheless the mechanisms looks quite tricky in practice: the inter-CPU communication/synchronization needs to be flawless otherwise it seems like anarchy and chaos could ensue... let's hope for rock solid CPU engineering!
How does CPU state save/restore work with user interrupts?
Oh! I see, thanks a lot for helping my understanding Ben!