Swap

Posted May 28, 2021 16:28 UTC (Fri) by corbet (editor, #1)
In reply to: Top-tier memory management by NHO
Parent article: Top-tier memory management

Swap is not directly addressible, though, so it doesn't really qualify as a "tier" in the sense being discussed here.

Swap

Posted May 28, 2021 16:35 UTC (Fri) by kay (guest, #1362) [Link]

tecnically yes, its no direct access memory

I remember computers using magnetic tape as memory ;-), so you can see it as veeery slow to access memory ;-)

Swap

Posted May 28, 2021 17:35 UTC (Fri) by calumapplepie (guest, #143655) [Link] (3 responses)

How hard would it be to rework swap into just another tier, from the perspective of memory load distribution?

Obviously, since swap can't be mapped for direct access by processes, it'd never be quite like the others. But duplicating the code for "move between fast and slow storage" seems like a worse call. Obviously swap needs a fair amount of unique logic: but so would many other different tiers. Further, generalizing a single system to allow for arbitrary tiers that can be as different as DRAM and spinning rust swapfiles would mean that the next weird memory system that is dreamed up by the hardware designers can be added without much effort.

Swap

Posted May 28, 2021 17:51 UTC (Fri) by corbet (editor, #1) [Link] (2 responses)

In a sense what you're asking for already exists, it's called "virtual memory". In that sense it is directly addressible and the kernel will automatically move data in and out.

Swap

Posted May 28, 2021 18:41 UTC (Fri) by faramir (subscriber, #2327) [Link] (1 responses)

While virtual memory is transparent to the software which is using it, it is not transparent to the system. It requires the system to find some real memory that can be (re)used. This can sometimes be a problem. With NUMA or persistent memory, that isn't a problem. Memory access may still be slower, but at least it will still work without any immediate work by the system.

Swap

Posted May 28, 2021 22:31 UTC (Fri) by MattBBaker (guest, #28651) [Link]

The system takes care of that feature too. It's fair to say that if a page was being evicted from DRAM, then on a system with just DRAM it would have been swapped instead. So why not assume that everything in slow space is going to be swapped too. Especially if the slow bank is an HBM space then you can migrate DRAM pages into the HBM banks and once you get HBM_LINE_SIZE pages then page them all out in bulk.