Lockless patterns: full memory barriers
Lockless patterns: full memory barriers
Posted Mar 9, 2021 5:00 UTC (Tue) by jcm (subscriber, #18262)In reply to: Lockless patterns: full memory barriers by pbonzini
Parent article: Lockless patterns: full memory barriers
Thing is you don’t even need to flush the sucker, just track age and ensure that they’ve all passed through. You can blow right through every barrier without cost provided you are willing to track enough cache lines in the process. I have been doing a lot of thinking lately about renaming SPRs and speculating through serializing instructions too. There’s no reason you couldn’t (provided you tracked everything, were willing to pay the cost, and also could precisely unwind the state to prevent side-channel crumbs, which might force you to add eg a side buffer). This has been dancing in my head for the past week solid.
