Lockless patterns: relaxed access and partial memory barriers

Posted Feb 28, 2021 4:19 UTC (Sun) by PengZheng (subscriber, #108006)
In reply to: Lockless patterns: relaxed access and partial memory barriers by PengZheng
Parent article: Lockless patterns: relaxed access and partial memory barriers

WRITE_ONCE(data.y, 890) after smp_wmb() sync with READ_ONCE(data.y) before smp_rmb().

In thread 1 we have
WRITE_ONCE(sc, sc + 1); // sc == 3
happens before
smp_wmb();
WRITE_ONCE(data.y, 890);

In thread 2 we have
copy.y = READ_ONCE(data.y);
smp_rmb();
happens before READ_ONCE(sc)

Thus WRITE_ONCE(sc, sc + 1); // sc == 3
happens before READ_ONCE(sc) in thread 2.