An introduction to lockless algorithms
An introduction to lockless algorithms
Posted Feb 21, 2021 19:13 UTC (Sun) by khim (subscriber, #9252)In reply to: An introduction to lockless algorithms by pbonzini
Parent article: An introduction to lockless algorithms
> On x86 that reordering cannot happen, on ARM and PowerPC it might.
Tiny correction: on x86 it can and will happen. You need memory barriers there, too.
After reading the aforementioned article I was confused for some time: memory barriers arrived on x86 with SSE… yet SMP was supported for more than decade by that time! Some investigation showed that any instruction with lock prefix acts as a memory barrier on x86. But if there are not memory barriers at all… yes, it does happen on x86, too.
Posted Feb 21, 2021 19:16 UTC (Sun)
by khim (subscriber, #9252)
[Link]
Posted Feb 21, 2021 20:51 UTC (Sun)
by pbonzini (subscriber, #60935)
[Link]
After looking on that article again I have realized that Jeff added addendum to the end which reveals all the gory details about An introduction to lockless algorithms
lock and xchg. So there are no mystery anymore…
An introduction to lockless algorithms