|
|
Subscribe / Log in / New account

Walleij: Setting up the Arm32 architecture

For those who are following along with Linus Walleij's detailed writeup of how the 32-bit Arm bootstrap process works, he has posted two new installments (part 1, part 2) on what happens once virtual memory is enabled. "This init task is task 0. It is not identical to task 1, which will be the init process. That is a completely different task that gets forked in userspace later on. This task is only about providing context for the kernel itself, and a point for the first task (task 1) to fork from. The kernel is very dependent on context as we shall see, and that is why its thread/task information and even the stack pointer for this 'task zero' is hardcoded into the kernel like this. This 'zero task' does not even appear to userspace if you type ps aux, it is hidden inside the kernel."

to post comments

Walleij: Setting up the Arm32 architecture

Posted Nov 3, 2020 12:29 UTC (Tue) by lkundrak (subscriber, #43452) [Link] (3 responses)

This whole series is excellent.

Thank you Linus, if you're reading this.

Walleij: Setting up the Arm32 architecture

Posted Nov 3, 2020 16:00 UTC (Tue) by pomac (subscriber, #94901) [Link]

I'll poke him if i see him :)

Walleij: Setting up the Arm32 architecture

Posted Nov 3, 2020 21:27 UTC (Tue) by linusw (subscriber, #40300) [Link] (1 responses)

Of course I read LWN!
The series came about because I can't understand this volume of complex code unless I also explain it to others.

Walleij: Setting up the Arm32 architecture

Posted Nov 3, 2020 22:49 UTC (Tue) by adam820 (subscriber, #101353) [Link]

Well, thanks for doing it; it helps out many others of us who are also trying to understand how it all works. :thumbsup:

Walleij: Setting up the Arm32 architecture

Posted Nov 4, 2020 9:26 UTC (Wed) by farnz (subscriber, #17727) [Link] (2 responses)

For those people wondering (as I did) what the "address exception" vector that Linus refers to is, and why it's no longer in use; it's the vector ARM26 systems (ARMv1/ARMv2 architecture, ARM1/2/3 chips) used when a virtual address outside the 26 bit bus range was accessed. Because ARM32 systems have a 32 bit address bus and 32 bit address calculations (compared to ARM26 with 26 bit address bus and 32 bit address calculations), this vector is no longer needed.

Walleij: Setting up the Arm32 architecture

Posted Nov 4, 2020 22:18 UTC (Wed) by linusw (subscriber, #40300) [Link] (1 responses)

Thanks! I updated the article with this information!

Walleij: Setting up the Arm32 architecture

Posted Nov 5, 2020 9:46 UTC (Thu) by farnz (subscriber, #17727) [Link]

No, thank you for a great set of articles!

I just happened to know where to look for details of that vector, as I have vague memories of it from the Acorn Archimedes days. IIRC, ARMv4 can optionally run in ARM26 mode (at the discretion of the silicon designer), and ARMv5 onwards is ARM32 only. It's only ARMv1/ARMv2 that must run in ARM26 mode, and the last ARMv2 series chip was the ARM3.

ARM naming up until Cortex was confusing as all get-out, since the ARM610 is an ARMv3 chip, and the first ARMv5 chip is the ARM9 series, while ARM7, ARM8 and ARM9 chips are all ARMv4.


Copyright © 2020, Eklektix, Inc.
Comments and public postings are copyrighted by their creators.
Linux is a registered trademark of Linus Torvalds