Lockless algorithms for mere mortals
Lockless algorithms for mere mortals
Posted Aug 1, 2020 14:32 UTC (Sat) by itsmycpu (guest, #139639)In reply to: Lockless algorithms for mere mortals by itsmycpu
Parent article: Lockless algorithms for mere mortals
If the reference counter is incremented relaxed, (for common use cases)  it implies that read/write access is synchronized separately. So I'd expect that decrementing can be relaxed as well if the thread that encounters a zero reference count still has read/write access (otherwise it should be enough to use a simple load-acquire on the synchronization variable).
However the (separate) synchronization of read/write access, which can't be relaxed, probably makes the gain look small in comparison, even on those platforms where it is larger. Which makes me wonder how large it is.
      Posted Aug 2, 2020 16:45 UTC (Sun)
                               by PaulMcKenney (✭ supporter ✭, #9624)
                              [Link] (2 responses)
       
Of course, the results will likely vary not only across CPU families, but also within CPU families. 
     
    
      Posted Aug 2, 2020 17:05 UTC (Sun)
                               by itsmycpu (guest, #139639)
                              [Link] (1 responses)
       
 
     
    
      Posted Aug 2, 2020 17:27 UTC (Sun)
                               by PaulMcKenney (✭ supporter ✭, #9624)
                              [Link] 
       
There is a lot of existing code to do such measurement, however, but on the other hand creating your own can be quite instructive. 
     
    Lockless algorithms for mere mortals
      
Lockless algorithms for mere mortals
      
Lockless algorithms for mere mortals
      
           