clk: intel: Add a new driver for a new clock controller IP
From: | Rahul Tanwar <rahul.tanwar-AT-linux.intel.com> | |
To: | mturquette-AT-baylibre.com, sboyd-AT-kernel.org, robh+dt-AT-kernel.org, mark.rutland-AT-arm.com | |
Subject: | [PATCH v2 0/2] clk: intel: Add a new driver for a new clock controller IP | |
Date: | Fri, 20 Dec 2019 11:31:06 +0800 | |
Message-ID: | <cover.1576811332.git.rahul.tanwar@linux.intel.com> | |
Cc: | linux-clk-AT-vger.kernel.org, devicetree-AT-vger.kernel.org, linux-kernel-AT-vger.kernel.org, andriy.shevchenko-AT-intel.com, yixin.zhu-AT-linux.intel.com, qi-ming.wu-AT-intel.com, Rahul Tanwar <rahul.tanwar-AT-linux.intel.com> | |
Archive-link: | Article |
Hi, This series adds clock driver for Clock Generation Unit(CGU) of Lightning Mountain(LGM) SoC. Patch 1 adds common clock framework based clock driver for CGU. Patch 2 adds bindings document & include file for CGU. These patches are baselined upon Linux 5.5-rc1 at below Git link: git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git v2: - Move the driver to x86 folder. - Remove syscon usage. - Remove regmap based access. Use direct readl()/write() instead. Add spinlocks. - Change all enum values to capitals. - Rename all data structures & functions from intel_* to lgm_*. - Remove multiple header files. Keep only one header file. - Make probe fail when any of the clk/pll registration fails. - Fix few bugs with clk_init_data assignement. - Address review concerns for code quality/style/convention. v1: - Initial version. Rahul Tanwar (1): dt-bindings: clk: intel: Add bindings document & header file for CGU rtanwar (1): clk: intel: Add CGU clock driver for a new SoC .../devicetree/bindings/clock/intel,cgu-lgm.yaml | 43 ++ drivers/clk/Kconfig | 8 + drivers/clk/x86/Makefile | 1 + drivers/clk/x86/clk-cgu-pll.c | 194 +++++++ drivers/clk/x86/clk-cgu.c | 559 +++++++++++++++++++++ drivers/clk/x86/clk-cgu.h | 296 +++++++++++ drivers/clk/x86/clk-lgm.c | 351 +++++++++++++ include/dt-bindings/clock/intel,lgm-clk.h | 150 ++++++ 8 files changed, 1602 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml create mode 100644 drivers/clk/x86/clk-cgu-pll.c create mode 100644 drivers/clk/x86/clk-cgu.c create mode 100644 drivers/clk/x86/clk-cgu.h create mode 100644 drivers/clk/x86/clk-lgm.c create mode 100644 include/dt-bindings/clock/intel,lgm-clk.h -- 2.11.0