| From: |
| Lad Prabhakar <prabhakar.csengg-AT-gmail.com> |
| To: |
| Bjorn Helgaas <bhelgaas-AT-google.com>, Rob Herring <robh+dt-AT-kernel.org>, Mark Rutland <mark.rutland-AT-arm.com>, Geert Uytterhoeven <geert+renesas-AT-glider.be>, Magnus Damm <magnus.damm-AT-gmail.com>, Kishon Vijay Abraham I <kishon-AT-ti.com>, Marek Vasut <marek.vasut+renesas-AT-gmail.com>, Yoshihiro Shimoda <yoshihiro.shimoda.uh-AT-renesas.com>, linux-pci-AT-vger.kernel.org |
| Subject: |
| [v2 0/6] Add support for PCIe controller to work in endpoint mode on R-Car SoCs |
| Date: |
| Fri, 13 Dec 2019 08:47:42 +0000 |
| Message-ID: |
| <20191213084748.11210-1-prabhakar.mahadev-lad.rj@bp.renesas.com> |
| Cc: |
| Catalin Marinas <catalin.marinas-AT-arm.com>, Will Deacon <will-AT-kernel.org>, Lorenzo Pieralisi <lorenzo.pieralisi-AT-arm.com>, Arnd Bergmann <arnd-AT-arndb.de>, Greg Kroah-Hartman <gregkh-AT-linuxfoundation.org>, Andrew Murray <andrew.murray-AT-arm.com>, devicetree-AT-vger.kernel.org, linux-kernel-AT-vger.kernel.org, linux-arm-kernel-AT-lists.infradead.org, linux-renesas-soc-AT-vger.kernel.org, Chris Paterson <Chris.Paterson2-AT-renesas.com>, Frank Rowand <frowand.list-AT-gmail.com>, Gustavo Pimentel <gustavo.pimentel-AT-synopsys.com>, Jingoo Han <jingoohan1-AT-gmail.com>, Simon Horman <horms-AT-verge.net.au>, Shawn Lin <shawn.lin-AT-rock-chips.com>, Tom Joseph <tjoseph-AT-cadence.com>, Heiko Stuebner <heiko-AT-sntech.de>, linux-rockchip-AT-lists.infradead.org, "Lad, Prabhakar" <prabhakar.mahadev-lad.rj-AT-bp.renesas.com> |
| Archive-link: |
| Article |
From: "Lad, Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
This patch series adds support for PCIe controller on rcar to work in endpoint mode,
this also extends the epf framework to handle features of outbound regions.
Note:
The cadence/rockchip/designware endpoint drivers are build tested only.
Changes for v2:
1] Fixed review comments from Biju for dt-bindings to include an example
for a tested platform.
2] Fixed review comments from Kishon to extend the features of outbound
regions in epf framework.
3] Added support to parse outbound-ranges in OF.
lspci output on host:
====================
01:00.0 Unassigned class [ff00]: Renesas Technology Corp. Device 002d
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 152
Region 0: Memory at fe200200 (64-bit, non-prefetchable) [size=128]
Region 2: Memory at fe200000 (64-bit, non-prefetchable) [size=256]
Region 4: Memory at fe200100 (64-bit, non-prefetchable) [size=256]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+
Address: 00000004fa36f000 Data: 0001
Masking: fffffffe Pending: 00000000
Capabilities: [70] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 0.000W
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr+ UncorrErr+ FatalErr- UnsuppReq+ AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s, Exit Latency L0s unlimited
ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 5GT/s, Width x1, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
AtomicOpsCap: 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
AtomicOpsCtl: ReqEn-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Kernel driver in use: pci-endpoint-test
00: 12 19 2d 00 06 00 10 00 00 00 00 ff 00 00 00 00
10: 04 02 20 fe 00 00 00 00 04 00 20 fe 00 00 00 00
20: 04 01 20 fe 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 98 01 00 00
BAR Test
========
root@g2e:~# pcitest -b 0
BAR0: OKAY
root@g2e:~# pcitest -b 1
BAR1: NOT OKAY
root@g2e:~# pcitest -b 2
BAR2: OKAY
root@g2e:~# pcitest -b 3
BAR3: NOT OKAY
root@g2e:~# pcitest -b 4
BAR4: OKAY
root@g2e:~# pcitest -b 5
BAR5: NOT OKAY
Note: BAR test for 1/3/5 fail because they are configured to be 64bits
Interrupt Test
==============
root@g2e:~# pcitest -i 0
SET IRQ TYPE TO LEGACY: OKAY
root@g2e:~# pcitest -l
LEGACY IRQ: OKAY
Read Test
=========
root@g2e:~# pcitest -r -s 1
READ ( 1 bytes): OKAY
root@g2e:~# pcitest -r -s 1024
READ ( 1024 bytes): OKAY
root@g2e:~# pcitest -r -s 1025
READ ( 1025 bytes): OKAY
root@g2e:~# pcitest -r -s 1024000
READ (1024000 bytes): OKAY
root@g2e:~# pcitest -r -s 1024001
READ (1024001 bytes): OKAY
Write Test
==========
root@g2e:~# pcitest -w -s 1
WRITE ( 1 bytes): OKAY
root@g2e:~# pcitest -w -s 1024
WRITE ( 1024 bytes): OKAY
root@g2e:~# pcitest -w -s 1025
WRITE ( 1025 bytes): OKAY
root@g2e:~# pcitest -w -s 1024000
WRITE (1024000 bytes): OKAY
root@g2e:~# pcitest -w -s 1024001
WRITE (1024001 bytes): OKAY
Copy Test
=========
root@g2e:~# pcitest -c -s 1
COPY ( 1 bytes): OKAY
root@g2e:~# pcitest -c -s 1024
COPY ( 1024 bytes): OKAY
root@g2e:~# pcitest -c -s 1025
COPY ( 1025 bytes): OKAY
root@g2e:~# pcitest -c -s 1024000
COPY (1024000 bytes): OKAY
root@g2e:~# pcitest -c -s 1024001
COPY (1024001 bytes): OKAY
Lad, Prabhakar (6):
pci: pcie-rcar: preparation for adding endpoint support
pci: endpoint: add support to handle features of outbound memory
of: address: add support to parse PCI outbound-ranges
dt-bindings: PCI: rcar: Add bindings for R-Car PCIe endpoint
controller
pci: rcar: add support for rcar pcie controller in endpoint mode
misc: pci_endpoint_test: add device-id for RZ/G2E pcie controller
.../devicetree/bindings/pci/rcar-pci-ep.txt | 37 +
arch/arm64/configs/defconfig | 2 +-
drivers/misc/pci_endpoint_test.c | 3 +
drivers/of/address.c | 44 +-
drivers/pci/controller/Kconfig | 11 +-
drivers/pci/controller/Makefile | 3 +-
drivers/pci/controller/dwc/pcie-designware-ep.c | 30 +-
drivers/pci/controller/pcie-cadence-ep.c | 11 +-
drivers/pci/controller/pcie-rcar-ep.c | 494 ++++++++
drivers/pci/controller/pcie-rcar-host.c | 1056 +++++++++++++++++
drivers/pci/controller/pcie-rcar.c | 1229 +-------------------
drivers/pci/controller/pcie-rcar.h | 129 ++
drivers/pci/controller/pcie-rockchip-ep.c | 13 +-
drivers/pci/endpoint/functions/pci-epf-test.c | 47 +-
drivers/pci/endpoint/pci-epc-core.c | 7 +-
drivers/pci/endpoint/pci-epc-mem.c | 216 +++-
include/linux/of_address.h | 21 +
include/linux/pci-epc.h | 72 +-
18 files changed, 2152 insertions(+), 1273 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/rcar-pci-ep.txt
create mode 100644 drivers/pci/controller/pcie-rcar-ep.c
create mode 100644 drivers/pci/controller/pcie-rcar-host.c
create mode 100644 drivers/pci/controller/pcie-rcar.h
--
2.7.4
