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Whither WireGuard?

By Jonathan Corbet
March 25, 2019
It has been just over one full year since the WireGuard virtual private network implementation was reviewed here. WireGuard has advanced in a number of ways since that article was written; it has gained many happy users, has been endorsed by Linus Torvalds, and is now supported by tools like NetworkManager. There is one notable thing that has not happened, though: WireGuard has not yet been merged into the mainline kernel. After a period of silence, WireGuard is back, and it would appear that the long process of getting upstream is nearly done.

A new version of the WireGuard patches was posted on March 22. WireGuard itself is not particularly controversial; few people have raised complaints about its design or implementation. The sticking point is the "Zinc" cryptographic library that WireGuard uses. Zinc was born out of frustration with the kernel's current cryptographic layer, which is seen by many as being far too difficult to use. Zinc is, in essence, an entirely new cryptographic layer that sits alongside the current code, duplicating a lot of functionality within the kernel but providing an easier interface for cryptographic tasks.

There are a few complaints that have been heard about Zinc. One of those revolves around the fact that Zinc isn't just a new API for accessing cryptographic algorithms; it also includes it own implementation of those algorithms, duplicating functionality that the kernel already has. WireGuard author Jason Donenfeld defends these new implementations, probably correctly, as having been subjected to a higher level of cryptographic review. Kernel developers strongly dislike this kind of duplication, though; they will argue that, if the new implementation of a specific algorithm is better, it should simply replace the existing one rather than duplicating it. That way, there is only one version to maintain, and all users will be able to take advantage of whatever benefits it offers.

The duplicated algorithms have been a sticking point for some time, but it would appear that a solution is in the works. Crypto maintainer Herbert Xu has posted a version of Zinc that introduces the new API, but which uses the existing algorithm implementations rather than Donenfeld's new ones. That makes the API available for users like WireGuard while removing the new algorithm implementations from the discussion for now. Those implementations can, in the future, be evaluated on their own merits and merged, one at a time, when a consensus emerges that they are better.

Past discussions might lead one to expect that Donenfeld would resist this move, but this time around he responded: "I think we're slightly closer to being same page". He plans to make some changes to Xu's version of Zinc, but the version he intends to post will still use existing, in-kernel algorithms where they are available. Assuming that everybody likes the result, one of the major long-term roadblocks to the merging of WireGuard will have been overcome.

Duplication of cryptographic functions is not the only complaint about Zinc, though; others were expressed by Ard Biesheuvel, whose criticisms have done a fair amount to impede Zinc in the past — but those criticisms have also resulted in numerous improvements to the code. Biesheuvel described Zinc as a "layering violation", and complained that it is unable to use the asynchronous algorithm implementations in the kernel. That is by design: Zinc explicitly only supports synchronous implementations (where the caller waits until each operation is done). Asynchronous implementations (which run in parallel, often on an external accelerator, while the caller does something else) are seen as too complex and providing too little benefit.

Biesheuvel disagrees with that view of asynchronous operations, and fears that, in the future, somebody will have to bolt asynchronous support onto Zinc. He would much rather see development effort going into fixing the deficiencies in the existing cryptographic API. He is not alone in this view, but others disagree, including Torvalds, who declared himself to be strongly in the Zinc camp:

And honestly, I'm 1000% with Jason on this. The crypto/ model is hard to use, inefficient, and completely pointless when you know what your cipher or hash algorithm is, and your CPU just does it well directly.

He went on to say that "none of the async accelerator code has ever been worth anything on real hardware and on any sane and real loads"; see his message for the details on his reasoning. If asynchronous crypto accelerators lack value in the real world, then it makes some sense to introduce an API that effectively ignores them. Naturally, this view of asynchronous crypto devices is not universally shared, or support for them would not exist in the kernel. See, in particular, this message from Pascal Van Leeuwen for a rebuttal of some of Torvalds's criticisms. But it does seem clear that asynchronous crypto is not particularly useful to a wide variety of use cases.

If the view expressed by Torvalds (and implicitly by Xu) wins out, and if the next posting of Zinc adequately addresses the concerns regarding duplicated algorithms, then Zinc's path into the mainline will start to look relatively clear. Unless some new problems arise with WireGuard (which seems unlikely, since even those who are opposed to Zinc tend to be supportive of WireGuard), it should be set to be merged as soon as Zinc gets in. That should bring a happy ending to the longish story of getting WireGuard into the mainline, conceivably as soon as the 5.2 development cycle.

Index entries for this article
KernelNetworking/Virtual private networks
SecurityEncryption/Network
SecurityLinux kernel/Virtual private network (VPN)


to post comments

Whither WireGuard?

Posted Mar 26, 2019 8:58 UTC (Tue) by nhippi (subscriber, #34640) [Link] (11 responses)

It's fascinating to watch the constant ebb and flow between CPU and accelerators. We find running things on CPU to slow or too power consuming, and implement specialized accelerator HW to deal with. Then we find the specialized HW to limiting and cumbersome to use, and retreat back to doing things on the general purpose CPU. Only to repeat the cycle in future.

Whither WireGuard?

Posted Mar 26, 2019 10:12 UTC (Tue) by eru (subscriber, #2753) [Link] (1 responses)

The phenomenon has been noticed long ago, it even has an entry in the Jargon file: http://catb.org/jargon/html/W/wheel-of-reincarnation.html

Whither WireGuard?

Posted Mar 26, 2019 10:54 UTC (Tue) by darwish (guest, #102479) [Link]

And in any kind of a complicated “system” (sw/hw/teams):

https://lwn.net/Articles/783496/

Whither WireGuard?

Posted Mar 26, 2019 18:20 UTC (Tue) by HenrikH (subscriber, #31152) [Link] (8 responses)

In the future CPU:s should perhaps add a big chunk of FPGA and just let the kernel implement their own offloading algorithms.

Whither WireGuard?

Posted Mar 26, 2019 19:02 UTC (Tue) by zdzichu (subscriber, #17118) [Link] (6 responses)

Whither WireGuard?

Posted Mar 27, 2019 0:37 UTC (Wed) by dskoll (subscriber, #1630) [Link]

I like the cost column for the processor with the FPGA: "arm, leg"

Whither WireGuard?

Posted Mar 27, 2019 5:50 UTC (Wed) by ofranja (guest, #11084) [Link] (4 responses)

Whither WireGuard?

Posted Mar 27, 2019 6:34 UTC (Wed) by jem (subscriber, #24231) [Link] (3 responses)

Xilinx's solution solves what could be called the opposite problem by adding a CPU to an FPGA. The CPU is used for slow and complex sequential logic supporting the main function of the chip, which is implemented using the programmable logic. The idea is to save silicon area by including a hardwired CPU core instead of a syntehsized one.

Whither WireGuard?

Posted Mar 27, 2019 14:15 UTC (Wed) by dskoll (subscriber, #1630) [Link] (1 responses)

The hard CPU cores in FPGAs are typically ARM cores that don't have stellar performance (this is true even for Alterra/Intel). Putting FPGA fabric in a high-performance CPU approaches the problem from the other direction and is quite interesting.

I suspect, though, that any cool designs implemented in an FPGA will eventually migrate either to a hard core or into the CPU for performance reasons. I think the FPGA fabric is mostly interesting as a prototyping solution.

Whither WireGuard?

Posted Mar 28, 2019 2:24 UTC (Thu) by raven667 (subscriber, #5198) [Link]

I think that is complementary with the original idea, a CPU with FPGA could deploy arbitrary new hardware features, anything that becomes ubiquitous can be reimplemented in fixed logic in later CPUs, freeing up FPGA for new uses. You get to have feedback about which hardware features are actually practical to developers before having to work them into the fixed design.

I don't know if that makes sense from the perspective of the chip real estate budget, would that area be better used for cache or something more mundane, would FPGA change the manufacturing cost? It's an interesting idea anyway

Whither WireGuard?

Posted Mar 27, 2019 19:32 UTC (Wed) by ofranja (guest, #11084) [Link]

For the embedded market, it's usually the trifecta time-to-market/cost/power.

Synthesizing an ARM processor this size would be really wasteful on an FPGA. I don't see anyone doing that in a product without a very strong reason (and a very good margin as well, to buffer the excess cost).

Whither WireGuard?

Posted Mar 28, 2019 15:13 UTC (Thu) by ejr (subscriber, #51652) [Link]

Oh, and don't forget the programmable NICs with CPU + FPGA + RAM combos embedded. What goes around...

Whither WireGuard?

Posted Mar 28, 2019 16:34 UTC (Thu) by Kamilion (subscriber, #42576) [Link]

After reading the message from Van Leeuwen, I feel depressed.

It's a shame I have to destroy all these Cavium Nitrox III cards.
They're worth more as scrap since there's no software support for these CN35XX cards, only the Nitrox V CN55XX following them landing in linux5.
Ironic that it's acidic Gold recovery for the Nitrox, and the PLX switch chips get safely reballed and resold off in china...

*sigh*


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