A collection of Meltdown/Spectre postings

Posted Jan 5, 2018 18:03 UTC (Fri) by gioele (subscriber, #61675)
In reply to: A collection of Meltdown/Spectre postings by joib
Parent article: A collection of Meltdown/Spectre postings

Christoph Hellwig already proposed some changes to the RISC-V privileged ISA: https://groups.google.com/a/groups.riscv.org/d/msg/isa-de...

Jacob Bachmeyer has posted a followup proposal: https://groups.google.com/a/groups.riscv.org/d/msg/isa-de...

The privileged ISA is going to change.

I hope the SiFive people and their Freedom U500 will not be affected too much.

A collection of Meltdown/Spectre postings

Posted Jan 6, 2018 14:16 UTC (Sat) by joib (subscriber, #8541) [Link]

> Christoph Hellwig already proposed some changes to the RISC-V privileged ISA: https://groups.google.com/a/groups.riscv.org/d/msg/isa-de...

Yes, I know, I posted that link myself a week ago: https://lwn.net/Articles/742301/ :) Not that I'm blaming you for missing it, considering the amount of posts left and right about this topic.

That being said, now that we have more information, I don't think that split page tables are strictly necessary. It seems Meltdown is due to a microarchitectural bug (or misfeature, if you will) in Intel CPU's, not an ISA level vulnerability. Split page tables could still be a good idea, in a belt-and-suspenders kind of way.

Spectre, OTOH, while not as serious as Meltdown right away, seems much more difficult to protect against without a significant performance penalty. And even so, I'm not sure there's much that can be specified at the ISA level.