Power-efficient workqueues

Posted Aug 18, 2017 16:07 UTC (Fri) by jhoblitt (subscriber, #77733)
Parent article: Power-efficient workqueues

Does an L2 cache miss on the core running the delayed work cause a wake up on idle cores to clear cache lines? Or is the L2 cache lost when a core goes into a low power state?

Power-efficient workqueues

Posted Aug 18, 2017 17:02 UTC (Fri) by sudeepkn (subscriber, #41381) [Link]

It shouldn't. Generally L2 caches are tied (not necessarily but mostly) to cluster power domain.
So as long as one CPU is active, cluster can't enter power off/retention state and hence L2 cache
remains powered on. This is generally applicable on systems where cores just have L1 caches.
However the recent cores have integrated L2 cache which will be powered off with core. In such
systems the above in applicable to any cluster level L3 cache.