Unaddressable device memory
Unaddressable device memory
Posted Mar 22, 2017 21:25 UTC (Wed) by jcm (subscriber, #18262)Parent article: Unaddressable device memory
Separately, however, we also need to prepare for the brighter future of unified, coherent, shared virtual memory in which we have one nice big virtual address space and external accelerators (GPUs, DSPs, FPGAs) can participate (even selectively) in the host coherency protocol and appear as just "memory". That does away with the need for some traditional handling of devices.
I recommend folks think about this in the concept of other industry efforts, such as CCIX, and (Open)CAPI, which provide a means to treat accelerators simply as being part of a NUMA-aware system. See for example the recent postings by IBM on coherent device memory.
Jon.