Rewrite after read is performed internally to DRAM, not by controller

It is correct that DRAM data reads require a row to be rewritten, just like magnetic core memory did, but for DRAM the rewrite is actually done internally by the DRAM chip itself. The controller, in the North bridge, CPU, or elsewhere outside the DRAM, doesn't take any special action to cause that rewrite.

This distinction doesn't in any way change the nature of the Rowhammer problem, so perhaps I'm being overly pedantic.

With ECC memory, the memory controller may be configured for scrubbing, in which case the memory controller does sweep through the DRAM, reading all locations and rewriting them if there is a correctable error. However, the DRAM still does rewrites internally for all memory read cycles, including scrub reads.

Often the ECC scrub rate is configurable, e.g., in BIOS settings. Unfortunately even with a high scrub rate, Rowhammer can still trigger uncorrectable errors within the scrub interval. However, a high scrub rate will likely reduce the probabilty of undetectable errors.