This is why we can't have safe cancellation points
This is why we can't have safe cancellation points
Posted Apr 18, 2016 11:10 UTC (Mon) by itvirta (guest, #49997)In reply to: This is why we can't have safe cancellation points by nix
Parent article: This is why we can't have safe cancellation points
> And yes, you do have one sequence, it's extremely stereotyped, and it'll always be in the icache
Stupid question: Does the instruction cache help if you're reading the instruction bytes as data?
Posted Apr 20, 2016 16:56 UTC (Wed)
by nix (subscriber, #2304)
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This is why we can't have safe cancellation points
Hm, no, but the L2+ caches are unified on many models (e.g. on all the Intel x86-64 CPUs I have access to, Nehalem and later), and getting stuff from L2 cache is still immensely faster than getting it from RAM, fast enough that you can often consider it free for applications like this.