A look at The Machine

The IBM i (ne AS400/Systemi/etc) MI architecture has been using 128-bit pointers since the 80s and does similar things to distinguish pointers. There are many different pointer types. One is a Space Pointer, which points to a MI space object (a memory region up to 16MiB - 1 page) that can be used for storing data. The bottom 64-bits are the actual 64-bit machine pointer and the top 64-bits are are 0 except for the top bit used to indicate it's a space pointer. If the machine ever goes to a CPU with a larger address space (as has already happened in the 90s moving from 48-bit custom CISC to 64-bit POWER), more bits can be used for the address (I don't know exactly how many bits are reserved for type distinction, though).

The MI architecture has special instructions for manipulating pointers, which prevent casting back and forth between int and if you try it, the tag bit will become unset by the hardware and attempting to dereference the pointer will cause a segmentation fault. This is similar to the CHERI CPU: https://lwn.net/Articles/604298/, though CHERI differs in that it has pointers and "capabilities" and you have to opt-in to capabilities, so applications that assume pointer == long continue to work, but you can get better protection by using capabilities - on IBM i there is no such luck, you have to update your application.