MCS locks and qspinlocks
MCS locks and qspinlocks
Posted Mar 13, 2014 15:55 UTC (Thu) by andresfreund (subscriber, #69562)In reply to: MCS locks and qspinlocks by james
Parent article: MCS locks and qspinlocks
> CPU1 obtains a lock;
> CPU2 tries to get the same lock, fails, and becomes next in line;
> CPU3 tries to get the same lock, fails, and becomes second in line;
> CPU2 is pre-empted by an interrupt;
> CPU1 releases the lock;
> CPU2 tries to get the same lock, fails, and becomes next in line;
> CPU3 tries to get the same lock, fails, and becomes second in line;
> CPU2 is pre-empted by an interrupt;
> CPU1 releases the lock;
Preemtion is disabled appropriately during spinlock acquiration IIRC.
Posted Aug 23, 2024 12:53 UTC (Fri)
by 301043030 (guest, #172920)
[Link]
MCS locks and qspinlocks
only process preemption is disabled, interruption is also valid.