Supporting KVM on the ARM architecture
Supporting KVM on the ARM architecture
Posted Jul 9, 2013 13:40 UTC (Tue) by jzbiciak (guest, #5246)Parent article: Supporting KVM on the ARM architecture
This is an excellent, excellent article. I've been studying ARM's virtualization hardware support, and wondered just exactly how Linux would make use of it, due to all the differences you described in your opening paragraphs. You've answered those questions thoroughly!
Basically, as I understand the concept, the host Linux runs at SVC level like any other guest, but, it has a special channel to communicate with a thin layer at HYP level to control all the HYP-specific machinery to control the other guests. Did I understand that correctly?
One very minor quibble. When describing address translation, you say:
Normally when an ARM processor issues a load/store instruction, the memory address used in the instruction is translated by the memory management unit (MMU) from a virtual address to a physical address using regular page tables, like this:
Virtual Address (VA) -> Intermediate Physical Address (IPA)
Shouldn't that just be "Virtual Address (VA) -> Physical Address (PA)"? I didn't think there was a notion of IPA when Stage-2 is not enabled. As I said, a very minor quibble.
Posted Jul 9, 2013 15:15 UTC (Tue)
by raven667 (subscriber, #5198)
[Link] (1 responses)
That sounds like how every other hypervisor such as Xen or VMware is architected. Xen has dom0 and VMware has the Service Console (or whatever it's called on ESXi). This seems to be a pattern in the design.
Posted Jul 11, 2013 6:44 UTC (Thu)
by christofferdall (guest, #63430)
[Link]
Xen's dom0 for example does not handle scheduling and memory allocation of VMs and boots directly into the Xen hypervisor in HYP mode and runs dom0 in many ways just like another guest. KVM/ARM boots in HYP, but immediately drops back into SVC mode, only returning to HYP mode to run a minimal amount of code in the most privileged mode.
VMware ESX and KVM on x86 both benefit from the x86 architecture, where there is no equivalent to the distinction between HYP mode and SVC mode on the host side - there is simply "root ring0" privilege level, and don't have to deal with separate mappings of code between the host kernel and the low-level part of the hypervisor, just to give an example.
In fact, this was the real challenge with designing KVM/ARM, that the architecture doesn't apparently fit very well with a KVM architecture, but our results show that this is not a significant concern for performance, and the it works out quite well from a software engineering point of view.
Posted Jul 11, 2013 6:36 UTC (Thu)
by christofferdall (guest, #63430)
[Link]
Supporting KVM on the ARM architecture
Supporting KVM on the ARM architecture
Supporting KVM on the ARM architecture