x32 ABI support by distributions
x32 ABI support by distributions
Posted May 24, 2013 8:52 UTC (Fri) by Matc (guest, #91112)In reply to: x32 ABI support by distributions by deater
Parent article: x32 ABI support by distributions
Arm have the same problem than x86 : arm64 is completly different from arm (32 bit).
It is new instruction, different registers, ...
But because arm64 have instruction for working on 32bits or 64bits data/register, it should be easy to do something like x32 on arm.
In fact arm64 is not a traditional RISC instruction set like PPC, mips, sparc :
- the instruction size is 32 (and not 64 bits)
- it works on 32 or 64 bits data
- register/instruction are different between native 32 bits mode and 64 bits mode.
Posted May 24, 2013 13:18 UTC (Fri)
by deater (subscriber, #11746)
[Link]
As far as I know there aren't any RISC chips with 64-bit long instructions (if that's what you mean). Usually they are fixed 4-byte (32bits).
Also the 64-bit RISC chips can operate on 32-bit (and smaller) values just fine. If you mean you can't operate on the bottom 32-bits with ALU instructions while ignoring the top 32-bit, that might be true.
I'll give you the last point though. ARM is unusual in that the instruction encoding is completely different between 32 and 64-bit. Even x86 didn't go to that full extreme
x32 ABI support by distributions
> mips, sparc :
> - the instruction size is 32 (and not 64 bits)
> - it works on 32 or 64 bits data
> - register/instruction are different between native 32 bits
> mode and 64 bits mode.