Definitely not speaking for my employer, but here goes..

>Could you provide links to the papers, algorithms and design source code ?
The design source code isn't available. There's a lot more to designing chip RTL at 22nm than just the implementation of the algorithms, so I'm not at liberty to reveal the source code.

I'm working towards making some C code available that models the design. This served as part of the design validation (it helps show model equivalence and calibrate entropy estimates) but could also answer a lot of the detail questions people have about the nature of the raw entropy.

Patrick OKeef has done an efficient job of linking to all the information that is out there. https://sites.google.com/site/intelrdrand/references

You might find Jesse Walker's talk, particularly the stuff at the end on the Ornstein-Uhlenback process (which nicely models ES) informative. http://www.ists.dartmouth.edu/docs/walker_ivy-bridge.pdf

The Intel Developer Forum talk should be out there somewhere. If not I can send it.

These guys performed external review. They did get to see the source code and had access to raw data and the engineers. Fortunately for us they didn't find anything too horrendous. The paper is here: http://www.cryptography.com/public/pdf/Intel_TRNG_Report_...

I described the details of the conditioning algorithms here: http://software.intel.com/en-us/forums/showthread.php?t=1...

There's more on the way, but we have to write it first.