Couldn't it be faster?

Think you're misremembering. The 7600 like its brethren had a scoreboard reservation system for functional units, and a dedicated divide unit. Thus it could pipeline issue a divide and immediately continue until a dependency arose (like modern processors, but decades earlier). But the slowest instruction on the CDC processors by a significant margin were floating divide and (initially) the population count instruction (how many 1s in the 60-bit word) that rumor has it was added at the request of a nameless intelligence agency).

According to the CDC 7600 hardware instant manual, floating divide (rounded or unrounded) on the processor took 20 minor cycles. Floating product took 5. Add/subtract were 4. Population count (58 cycles on the 6400) was down to 2 cycles on the 7600.

I cut my teeth on a Cyber 74. Ahh, those were the days.