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IOMMU, what is it?

IOMMU, what is it?

Posted Jul 3, 2008 12:52 UTC (Thu) by Duncan (guest, #6647)
In reply to: Quotes of the week by shapr
Parent article: Quotes of the week

IOMMU == I/O (input/output) MMU (memory management unit).

One big reason for them is to allow DMA I/O access to memory beyond the 
4-gig barrier in 64-bit mode.  Due to the I/O "memory hole" just below 4 
GB, this applies to folks with 4 GB of memory (who will often have the 
last bit remapped above 4 GB bringing it out from behind the hole) as 
well.

All AMD64 chipsets should all have an IOMMU (altho I'm not positive about 
some of the earlier non-AMD chipsets).  Early em64t or whatever Intel 
called it did *NOT* have a hardware IOMMU -- the kernel had to "fake it" 
with a bounce-buffer -- in which case those "DMAs" weren't so "direct" 
after all.  However, the same kernel config option controls the 
bounce-buffer on that hardware.

So, if you're running 64-bit AMD64/x86_64 and have >= 4 GB memory, you 
DEFINITELY want the IOMMU activated.  I'm not sure about 32-bit, but 
expect it'd be similar if somewhat more complicated to to the "hacks" 
necessary to access > 4 GB of memory on a 32-bit OS.

The kernel config option, CONFIG_GART_IOMMU, is found under Processor type 
and features.  On the 2.6.26-rcs, it's labeled "GART IOMMU support", tho 
it was labeled differently some releases back (it changed say between 
2.6.16 and 2.6.22, I've forgotten).  The help is actually reasonably 
informative, at least once you have the background on it I briefly 
outlined above.

I don't know anything about the IBM Calgary IOMMU listed as another 
option, but it's apparently on IBM hardware only, according to the help.  
Don't get confused by it.


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