| From: |
| Xu Lu <luxu.kernel-AT-bytedance.com> |
| To: |
| corbet-AT-lwn.net, paul.walmsley-AT-sifive.com, palmer-AT-dabbelt.com, aou-AT-eecs.berkeley.edu, alex-AT-ghiti.fr, robh-AT-kernel.org, krzk+dt-AT-kernel.org, conor+dt-AT-kernel.org, will-AT-kernel.org, peterz-AT-infradead.org, boqun.feng-AT-gmail.com, mark.rutland-AT-arm.com, anup-AT-brainfault.org, atish.patra-AT-linux.dev, pbonzini-AT-redhat.com, shuah-AT-kernel.org, parri.andrea-AT-gmail.com, ajones-AT-ventanamicro.com, brs-AT-rivosinc.com, guoren-AT-kernel.org |
| Subject: |
| [PATCH v4 00/10] riscv: Add Zalasr ISA extension support |
| Date: |
| Mon, 20 Oct 2025 12:20:46 +0800 |
| Message-ID: |
| <20251020042056.30283-1-luxu.kernel@bytedance.com> |
| Cc: |
| linux-doc-AT-vger.kernel.org, linux-riscv-AT-lists.infradead.org, linux-kernel-AT-vger.kernel.org, devicetree-AT-vger.kernel.org, kvm-AT-vger.kernel.org, kvm-riscv-AT-lists.infradead.org, linux-kselftest-AT-vger.kernel.org, apw-AT-canonical.com, joe-AT-perches.com, lukas.bulwahn-AT-gmail.com, Xu Lu <luxu.kernel-AT-bytedance.com> |
| Archive-link: |
| Article |
This patch adds support for the Zalasr ISA extension, which supplies the
real load acquire/store release instructions.
The specification can be found here:
https://github.com/riscv/riscv-zalasr/blob/main/chapter2....
This patch seires has been tested with ltp on Qemu with Brensan's zalasr
support patch[1].
Some false positive spacing error happens during patch checking. Thus I
CCed maintainers of checkpatch.pl as well.
[1] https://lore.kernel.org/all/CAGPSXwJEdtqW=nx71oufZp64nK6t...
v4:
- Apply acquire/release semantics to arch_atomic operations. Thanks
to Andrea.
v3:
- Apply acquire/release semantics to arch_xchg/arch_cmpxchg operations
so as to ensure FENCE.TSO ordering between operations which precede the
UNLOCK+LOCK sequence and operations which follow the sequence. Thanks
to Andrea.
- Support hwprobe of Zalasr.
- Allow Zalasr extensions for Guest/VM.
v2:
- Adjust the order of Zalasr and Zalrsc in dt-bindings. Thanks to
Conor.
Xu Lu (10):
riscv: Add ISA extension parsing for Zalasr
dt-bindings: riscv: Add Zalasr ISA extension description
riscv: hwprobe: Export Zalasr extension
riscv: Introduce Zalasr instructions
riscv: Apply Zalasr to smp_load_acquire/smp_store_release
riscv: Apply acquire/release semantics to arch_xchg/arch_cmpxchg
operations
riscv: Apply acquire/release semantics to arch_atomic operations
riscv: Remove arch specific __atomic_acquire/release_fence
RISC-V: KVM: Allow Zalasr extensions for Guest/VM
RISC-V: KVM: selftests: Add Zalasr extensions to get-reg-list test
Documentation/arch/riscv/hwprobe.rst | 5 +-
.../devicetree/bindings/riscv/extensions.yaml | 5 +
arch/riscv/include/asm/atomic.h | 70 ++++++++-
arch/riscv/include/asm/barrier.h | 91 +++++++++--
arch/riscv/include/asm/cmpxchg.h | 144 +++++++++---------
arch/riscv/include/asm/fence.h | 4 -
arch/riscv/include/asm/hwcap.h | 1 +
arch/riscv/include/asm/insn-def.h | 79 ++++++++++
arch/riscv/include/uapi/asm/hwprobe.h | 1 +
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kernel/cpufeature.c | 1 +
arch/riscv/kernel/sys_hwprobe.c | 1 +
arch/riscv/kvm/vcpu_onereg.c | 2 +
.../selftests/kvm/riscv/get-reg-list.c | 4 +
14 files changed, 314 insertions(+), 95 deletions(-)
--
2.20.1