| From: |
| Suravee Suthikulpanit <suravee.suthikulpanit-AT-amd.com> |
| To: |
| <jgg-AT-nvidia.com>, <nicolinc-AT-nvidia.com> |
| Subject: |
| [PATCH v2 00/12] iommu/amd: Introduce Nested Translation support |
| Date: |
| Wed, 01 Oct 2025 06:09:42 +0000 |
| Message-ID: |
| <20251001060954.5030-1-suravee.suthikulpanit@amd.com> |
| Cc: |
| <linux-kernel-AT-vger.kernel.org>, <robin.murphy-AT-arm.com>, <will-AT-kernel.org>, <joro-AT-8bytes.org>, <kevin.tian-AT-intel.com>, <jsnitsel-AT-redhat.com>, <vasant.hegde-AT-amd.com>, <iommu-AT-lists.linux.dev>, <santosh.shukla-AT-amd.com>, <sairaj.arunkodilkar-AT-amd.com>, <jon.grimm-AT-amd.com>, <prashanthpra-AT-google.com>, <wvw-AT-google.com>, <wnliu-AT-google.com>, <gptran-AT-google.com>, <kpsingh-AT-google.com>, <joao.m.martins-AT-oracle.com>, <alejandro.j.jimenez-AT-oracle.com>, Suravee Suthikulpanit <suravee.suthikulpanit-AT-amd.com> |
| Archive-link: |
| Article |
This series introduces support for AMD IOMMU nested page table translation
with the host (v1) and guest (v2) page tables.
In this mode, the AMD IOMMU driver configures the Device Table Entry (DTE)
with host page table root pointer, which is configured by allocating domain
with page table type IOMMU_HWPT_ALLOC_NEST_PARENT.
The guest page tables and Guest CR3 (GCR3) tables are managed by Guest OS,
and stored in the guest DTE (gDTE) in guest memory. VMM is responsible for
passing gDTE information to the host IOMMU driver using struct
iommu_hwpt_amd_guest when allocating a domain type IOMMU_DOMAIN_NESTED.
Then, the gDTE is parsed and program onto host DTE by the AMD IOMMU driver.
In addition, this series introduces base code for IOMMUFD vIOMMU for AMD
IOMMU, and implements vIOMMU-based nested domain allocation interface.
The struct nested_domain to store nested domain information, and
set_dte_nested() helper function to handle DTE programing for the nested
domain.
The series is separated into two parts:
* Patch 1-7 are preparatory patches.
* Patch 8-12 implement nest-parent and nested domains support
for IOMMUFD vIOMMU.
Thanks,
Suravee
Note: This series is rebased on top of:
* [PATCH v5] iommu/amd: Add support for hw_info for iommu capability query
https://lore.kernel.org/linux-iommu/20250926141901.511313...
Changes from V1:
(https://lore.kernel.org/linux-iommu/20250820113009.5233-1...)
* Patch 10: Introduce struct nested_domain instead of reusing
struct protection_domain.
* Patch 11: Introduce set_dte_nested() insted of reusing set_dte_entry().
* Patch 12: Introduce struct iommu_viommu_amd and base code for IOMMUFD
vIOMMU. This is mainly to allow nested domain integration with
struct iommufd_viommu_ops.alloc_domain_nested for vIOMMU-based
nesting support.
Suravee Suthikulpanit (12):
iommu/amd: Rename DEV_DOMID_MASK to DTE_DOMID_MASK
iommu/amd: Make amd_iommu_pdom_id_alloc() non-static
iommu/amd: Make amd_iommu_pdom_id_free() non-static
iommu/amd: Make amd_iommu_device_flush_dte() non-static
iommu/amd: Make amd_iommu_update_dte256() non-static
iommu/amd: Make amd_iommu_make_clear_dte() non-static inline
iommu/amd: Make amd_iommu_completion_wait() non-static
iommufd: Introduce data struct for AMD nested domain allocation
iommu/amd: Add support for nest parent domain allocation
iommu/amd: Add support for nested domain allocation
iommu/amd: Add support for nested domain attach/detach
iommu/amd: Introduce IOMMUFD vIOMMU support for AMD
drivers/iommu/amd/Makefile | 2 +-
drivers/iommu/amd/amd_iommu.h | 33 ++++++
drivers/iommu/amd/amd_iommu_types.h | 45 +++++--
drivers/iommu/amd/init.c | 3 +
drivers/iommu/amd/iommu.c | 178 ++++++++++++++++++++--------
drivers/iommu/amd/iommufd.c | 8 ++
drivers/iommu/amd/iommufd.h | 2 +
drivers/iommu/amd/nested.c | 172 +++++++++++++++++++++++++++
include/uapi/linux/iommufd.h | 30 +++++
9 files changed, 413 insertions(+), 60 deletions(-)
create mode 100644 drivers/iommu/amd/nested.c
--
2.34.1
