| From: |
| John Allen <john.allen-AT-amd.com> |
| To: |
| <kvm-AT-vger.kernel.org>, <linux-kernel-AT-vger.kernel.org>, <x86-AT-kernel.org>, <seanjc-AT-google.com>, <pbonzini-AT-redhat.com>, <dave.hansen-AT-intel.com> |
| Subject: |
| [PATCH v3 0/2] Support for SEV-ES guest shadow stack |
| Date: |
| Wed, 24 Sep 2025 20:08:50 +0000 |
| Message-ID: |
| <20250924200852.4452-1-john.allen@amd.com> |
| Cc: |
| <rick.p.edgecombe-AT-intel.com>, <mlevitsk-AT-redhat.com>, <weijiang.yang-AT-intel.com>, <chao.gao-AT-intel.com>, <bp-AT-alien8.de>, <dave.hansen-AT-linux.intel.com>, <hpa-AT-zytor.com>, <mingo-AT-redhat.com>, <tglx-AT-linutronix.de>, <thomas.lendacky-AT-amd.com>, John Allen <john.allen-AT-amd.com> |
| Archive-link: |
| Article |
For shadow stack support in SVM when using SEV-ES, the guest kernel
needs to save XSS to the GHCB in order for the hypervisor to determine
the XSAVES save area size.
This series can be applied independently of the hypervisor series in
order to support non-KVM hypervisors.
---
v3:
- Only CPUID.0xD.1 consumes XSS. Limit including XSS in GHCB for this
case.
v2:
- Update changelog for patch 2/2
John Allen (2):
x86/boot: Move boot_*msr helpers to asm/shared/msr.h
x86/sev-es: Include XSS value in GHCB CPUID request
arch/x86/boot/compressed/sev.c | 7 ++++---
arch/x86/boot/compressed/sev.h | 6 +++---
arch/x86/boot/cpucheck.c | 16 ++++++++--------
arch/x86/boot/msr.h | 26 --------------------------
arch/x86/coco/sev/vc-shared.c | 11 +++++++++++
arch/x86/include/asm/shared/msr.h | 15 +++++++++++++++
arch/x86/include/asm/svm.h | 1 +
7 files changed, 42 insertions(+), 40 deletions(-)
delete mode 100644 arch/x86/boot/msr.h
--
2.47.3
