Add AMD MDB Endpoint and non-LL mode Support
From: | Devendra K Verma <devendra.verma-AT-amd.com> | |
To: | <bhelgaas-AT-google.com>, <mani-AT-kernel.org>, <vkoul-AT-kernel.org> | |
Subject: | [PATCH v4 0/2] Add AMD MDB Endpoint and non-LL mode Support | |
Date: | Thu, 18 Sep 2025 18:23:22 +0530 | |
Message-ID: | <20250918125324.26033-1-devendra.verma@amd.com> | |
Cc: | <dmaengine-AT-vger.kernel.org>, <linux-pci-AT-vger.kernel.org>, <linux-kernel-AT-vger.kernel.org>, <michal.simek-AT-amd.com> | |
Archive-link: | Article |
This series of patch support the following: - AMD MDB Endpoint Support, as part of this patch following are added: o AMD supported device ID and vendor ID (Xilinx) o AMD MDB specific driver data o AMD specific VSEC capabilities to retrieve the base of phys address of MDB side DDR o Logic to assign the offsets to LL and data blocks if more number of channels are enabled than configured in the given pci_data struct. - Addition of non-LL mode o The IP supported non-LL mode functions o Flexibility to choose non-LL mode via dma_slave_config param peripheral_config, by the client o Allow IP utilization if LL mode is not available Devendra K Verma (2): dmaengine: dw-edma: Add AMD MDB Endpoint Support dmaengine: dw-edma: Add non-LL mode drivers/dma/dw-edma/dw-edma-core.c | 38 ++++++-- drivers/dma/dw-edma/dw-edma-core.h | 1 + drivers/dma/dw-edma/dw-edma-pcie.c | 160 ++++++++++++++++++++++++++++++++-- drivers/dma/dw-edma/dw-hdma-v0-core.c | 62 ++++++++++++- include/linux/dma/edma.h | 1 + 5 files changed, 248 insertions(+), 14 deletions(-) -- 1.8.3.1