LWN: Comments on "Top-tier memory management" https://lwn.net/Articles/857133/ This is a special feed containing comments posted to the individual LWN article titled "Top-tier memory management". en-us Mon, 13 Oct 2025 07:44:43 +0000 Mon, 13 Oct 2025 07:44:43 +0000 https://www.rssboard.org/rss-specification lwn@lwn.net Top-tier memory management https://lwn.net/Articles/858264/ https://lwn.net/Articles/858264/ krakensden <div class="FormattedComment"> I&#x27;m pretty excited about that patch set, the abstract makes it sound like a huge win.<br> </div> Fri, 04 Jun 2021 04:53:22 +0000 Top-tier memory management https://lwn.net/Articles/857663/ https://lwn.net/Articles/857663/ Paf <div class="FormattedComment"> I’m not sure of the precise cost of the mechanisms being proposed here, but the page cache LRU is kind of expensive (at least to me as an FS developer optimizing throughput). I’m not sure that kind of management is appropriate for all of memory. (But I might be off in terms of scale.)<br> </div> Sun, 30 May 2021 14:54:41 +0000 Top-tier memory management https://lwn.net/Articles/857660/ https://lwn.net/Articles/857660/ flussence <div class="FormattedComment"> It&#x27;s *possible*, but at present it also sounds like an incredibly niche feature for a few extra MHz that&#x27;d get shot down by manufacturers just telling users to not use mismatched RAM sticks.<br> <p> This idea isn&#x27;t too far from how old CPUs had independent functional units for x87/SSE/3DNow. I&#x27;ve heard urban legends about clever asm programmers wringing a few percent more speed out of those, but it wasn&#x27;t a party trick worth spending silicon on in the long run.<br> </div> Sun, 30 May 2021 12:29:52 +0000 Top-tier memory management https://lwn.net/Articles/857659/ https://lwn.net/Articles/857659/ willy <div class="FormattedComment"> While that sounds appealing, you&#x27;re really just giving up a lot of bandwidth. If you have N sticks of RAM, you want to let the CPU put cache line L on stick L % N.<br> <p> What you&#x27;re proposing would put pages A-B on stick 0, B-C on stick 1, etc. It&#x27;s like choosing concatenation instead of RAID 0.<br> </div> Sun, 30 May 2021 10:30:06 +0000 Top-tier memory management https://lwn.net/Articles/857657/ https://lwn.net/Articles/857657/ Cyberax <div class="FormattedComment"> That&#x27;s actually not at all a problem. CPUs talk with DRAM through a memory controller, and it can already change the DRAM frequency. <br> </div> Sun, 30 May 2021 08:47:09 +0000 Top-tier memory management https://lwn.net/Articles/857656/ https://lwn.net/Articles/857656/ flussence <div class="FormattedComment"> That sounds like a nice thing to have, but it seems more likely we&#x27;ll have practical nuclear fusion before mainboards that support independent memory channel clocks.<br> </div> Sun, 30 May 2021 08:06:27 +0000 Top-tier memory management https://lwn.net/Articles/857655/ https://lwn.net/Articles/857655/ pabs <div class="FormattedComment"> I wonder if this sort of thing could allow driving memory sticks of different speeds at different rates and preferring the faster ones.<br> </div> Sun, 30 May 2021 07:11:25 +0000 Swap https://lwn.net/Articles/857623/ https://lwn.net/Articles/857623/ MattBBaker <div class="FormattedComment"> The system takes care of that feature too. It&#x27;s fair to say that if a page was being evicted from DRAM, then on a system with just DRAM it would have been swapped instead. So why not assume that everything in slow space is going to be swapped too. Especially if the slow bank is an HBM space then you can migrate DRAM pages into the HBM banks and once you get HBM_LINE_SIZE pages then page them all out in bulk. <br> </div> Fri, 28 May 2021 22:31:49 +0000 Top-tier memory management https://lwn.net/Articles/857608/ https://lwn.net/Articles/857608/ droundy <div class="FormattedComment"> I wonder why something closer to the LRU used for the page cache wouldn&#x27;t be used for determining which tier a page belongs in? It kind of seems like the same problem.<br> </div> Fri, 28 May 2021 19:06:39 +0000 Swap https://lwn.net/Articles/857605/ https://lwn.net/Articles/857605/ faramir <div class="FormattedComment"> While virtual memory is transparent to the software which is using it, it is not transparent to the system. It requires the system to find some real memory that can be (re)used. This can sometimes be a problem. With NUMA or persistent memory, that isn&#x27;t a problem. Memory access may still be slower, but at least it will still work without any immediate work by the system.<br> </div> Fri, 28 May 2021 18:41:23 +0000 Swap https://lwn.net/Articles/857600/ https://lwn.net/Articles/857600/ corbet In a sense what you're asking for already exists, it's called "virtual memory". In that sense it is directly addressible and the kernel will automatically move data in and out. Fri, 28 May 2021 17:51:21 +0000 Swap https://lwn.net/Articles/857596/ https://lwn.net/Articles/857596/ calumapplepie <div class="FormattedComment"> How hard would it be to rework swap into just another tier, from the perspective of memory load distribution?<br> <p> Obviously, since swap can&#x27;t be mapped for direct access by processes, it&#x27;d never be quite like the others. But duplicating the code for &quot;move between fast and slow storage&quot; seems like a worse call. Obviously swap needs a fair amount of unique logic: but so would many other different tiers. Further, generalizing a single system to allow for arbitrary tiers that can be as different as DRAM and spinning rust swapfiles would mean that the next weird memory system that is dreamed up by the hardware designers can be added without much effort.<br> </div> Fri, 28 May 2021 17:35:11 +0000 Swap https://lwn.net/Articles/857594/ https://lwn.net/Articles/857594/ kay <div class="FormattedComment"> tecnically yes, its no direct access memory<br> <p> I remember computers using magnetic tape as memory ;-), so you can see it as veeery slow to access memory ;-)<br> </div> Fri, 28 May 2021 16:35:48 +0000 Swap https://lwn.net/Articles/857592/ https://lwn.net/Articles/857592/ corbet Swap is not directly addressible, though, so it doesn't really qualify as a "tier" in the sense being discussed here. Fri, 28 May 2021 16:28:21 +0000 Top-tier memory management https://lwn.net/Articles/857589/ https://lwn.net/Articles/857589/ kay <div class="FormattedComment"> Indeed and to extend your remark: this sounds very similar to the LRU page reclaim idea described in <a href="https://lwn.net/Articles/856931/">https://lwn.net/Articles/856931/</a><br> </div> Fri, 28 May 2021 16:26:02 +0000 Top-tier memory management https://lwn.net/Articles/857588/ https://lwn.net/Articles/857588/ NHO <div class="FormattedComment"> What is swap but a very slow memory tier?<br> </div> Fri, 28 May 2021 16:13:47 +0000