LWN: Comments on "Virtual Memory I: the problem" https://lwn.net/Articles/75174/ This is a special feed containing comments posted to the individual LWN article titled "Virtual Memory I: the problem". en-us Fri, 10 Oct 2025 12:36:47 +0000 Fri, 10 Oct 2025 12:36:47 +0000 https://www.rssboard.org/rss-specification lwn@lwn.net Virtual Memory I: the problem https://lwn.net/Articles/76575/ https://lwn.net/Articles/76575/ alpharomeo Some questions/comments:<p>1) Why not cause the kernel to manage memory in de fact pages larger than 4K? A larger page is how other OS's manager large memory efficiently, whether we are talking 32 bit or 64 bit addressing. To avoid breakage, why not keep the current 4K page size but have the kernel always allocate/free pages in blocks of, say, 16 pages, or even 256 pages? Then the page table would be vastly smaller.<p>2) It may be convenient to say &quot;use a 64 bit machine&quot;. The fact is that 64 bit addressing is inefficient and overkill for many situations. Experience with several architectures that support simultaneous 32-bit and 64-bit applications has shown that the 64-bit builds run at least 25-30% slower than the corresponding 32-bit builds. Bigger addresses means bigger programs, bigger stacks and heaps, etc.. Some applications may require nearly twice as much memory when run in 64-bit mode. So, why not optimize the kernel to provide better support for 32-bit addressing? In particular, what is so wrong with supporting infinite physical memory but limiting process address space to 4 GB (or 3 GB)?<p>3) Why is shared memory such a big problem? We have never been able to get Linux to allow shared memory segments larger than slightly less than 1 GB. Is there some trick to it? Linux reports that there is insufficient swap space, but it does not matter how many swap partitions you allocate - you always get the same error.<p>Thanks!<p> Sun, 21 Mar 2004 01:02:40 +0000 Virtual Memory I: the problem https://lwn.net/Articles/76546/ https://lwn.net/Articles/76546/ mysticalreaper As the other reply stated, SGI's altix runs on Intel's Itanium 2 processors, which are 64 bit, and thus, can address a silly amount of memory (2^64 bytes) and so do not suffer these silly problems. Sat, 20 Mar 2004 01:35:22 +0000 Why only 1 G is directly accessible https://lwn.net/Articles/75495/ https://lwn.net/Articles/75495/ Duncan First, keep in mind that we are talking about a less than 4 gig address <br>space, the physical limit of the &quot;flat&quot; memory model, 32-bits of address, <br>with each address serving one byte of memory. One can of course play with <br>the byte-per-address model and make it, say, two bytes or a full 32-bit <br>4-bytes, but there again, we get into serious compatibility problems with <br>current software that assumes one-byte handling. The implications of that <br>would be HUGE, and NOBODY wants to tackle the task of ensuring <br>4-byte-per-address clean code, since the assumption has been <br>byte-per-address virtually forever and virtually ALL programs have that <br>axiom written so deep into their code you might as well start over again <br>(which is sort of what Intel argued should be the case with Itanic, clean <br>start approach, anyway, taking the opportunity to move cleanly to 64-bit, <br>which is why it never really took off, but that's an entirely different <br>topic). It's simply easier to move to 64-bit address space than to tinker <br>with the byte-per-address assumption. Thus, 32-bit is limited to 4-gig of <br>directly addressable memory in any practical case. <br> <br>Another solution, as generally used back in the 16-bit era, is called <br>&quot;segmented&quot; memory. The address back then consisted of a 16-bit &quot;near&quot; <br>address, and a 16-bit &quot;segment&quot; address. The issue, as one would expect, <br>ammounted to one of performance. It was comparatively fast to access <br>anything within the same segment, much slower to address anything OUT of <br>the segment. As it happened, 64k was the segment size, and if you <br>remember anything from that era, it might be that editors, for instance, <br>quite commonly had a limit on the size of the editable file of somewhat <br>less than 64k, so they could access both their own operational memory AND <br>the datafile being edited, all within the same 64k segment. However, the <br>benefits of &quot;flat&quot; memory are such that few want to go back to a segmented <br>memory model, if at all possible to stay away from it. (That said, the <br>various high memory models do essentially that, but try to manage it at <br>the system level so at least individual applications don't have to worry <br>about it, as they did back in the 16-bit era.) <br> <br>That still doesn't &quot;address&quot; (play on words intentional) the lower 1-gig <br>kernel-space, 3-gig user-space, &quot;soft&quot; limit. As you mention, yes, in <br>theory the kernel /can/ address the full 4-gig. The problem, however, is <br>hinted at elsewhere in the article where it talks about the 4G/4G patch -- <br>use all available direct address space for the kernel, and switching <br>between usermode and kernelmode becomes even MORE tremendously expensive <br>than it already is, in performance terms, because if they use the same <br>address space, the entire 4-gig &quot;picture&quot; has to be flushed (more on that <br>below), so the new &quot;picture&quot; of the other mode can be substituted without <br>losing data. As explained in the article each mode then has to manage its <br>own memory picture, and the performance issues of flushing that picture so <br>another one can replace it at each context switch are enormous. <br> <br>As already mentioned in other replies, there are a number of solutions, <br>each with their own advantages and disadvantages. One is the 2G/2G split, <br>which BTW is what MSWormOS uses. This symmetric approach allows both the <br>kernel and userspace to access the same four gig maximum &quot;picture&quot;, each <br>from their own context, but sharing the picture, so the performance issues <br>in flushing it don't come into play. It does give the kernel more <br>comfortable room to work in, but at the expense of that extra gig for <br>userspace. While few applications need more than their two-gig share of <br>memory to work in, the very types of applications that do, huge database <br>applications and other such things, happen to be run on the same sorts of <br>systems that need that extra room for the kernel.. huge enterprise systems <br>with well over eight gig of physical memory. Thus, the 2G/2G solution is <br>a niche solution that will fit only a very limited subset of those running <br>into the problem in the first place. The 4G/4G solution is more practical <br>-- EXCEPT that it carries those huge performance issues. Well, there's <br>also the fact that even a 4G/4G solution only doubles the space available <br>to work with, and thus is only a temporary solution at best, perhaps two <br>years worth, maybe 3-4 by implimenting other &quot;tricks&quot; with their own <br>problems, even if the base performance issue didn't apply. That's where <br>the next article comes in. <br> <br>The loose end left to deal with is that flushing, mentioned above. I must <br>admit to not fully understanding this myself, but a very simplistic view <br>of things would be to imagine a system with 8 gig of physical memory, <br>dealt with using the previously mentioned &quot;segments&quot;, of which there would <br>be two, one each for userspace and kernel space. A mode switch would then <br>simply mean changing the segment reference, ensuring all cache memory is <br>flushed out to the appropriate segment before one does so, of course. <br> <br>Practice of course doesn't match that concept perfectly very often at all, <br>however, and even if a system DID happen to have exactly eight gig of <br>memory, such a simplistic model wouldn't work in real life because of <br>/another/ caveat.. that being that each application has its own virtual <br>address space map, and few actually use the entire thing, so one would be <br>writing to swap (a 100 to 1000 times slower solution than actual memory, <br>so a generally poor solution if not absolutely necessary) entirely <br>unnecessarily with only one application being runnable at once. <br> <br>That of course is where vm=virtual memory comes in. as it allows all the <br>space unused by one app or the kernel itself to be used by another, with <br>its own remapping solutions. However, that's the part I don't really <br>understand, so won't attempt to explain it. Besides, this post is long <br>enough already. &lt;g&gt; Just understand that flushing is a necessary process <br>of low enough performance that it should be avoided if possible, and that <br>the concept is one of clearing the slate so it can be used for the new <br>memory picture, while retaining the data of the first one so it can be <br>used again. <br> <br>Duncan <br> Fri, 12 Mar 2004 09:51:00 +0000 Virtual Memory I: the problem https://lwn.net/Articles/75466/ https://lwn.net/Articles/75466/ jmshh The keyword here is &quot;directly&quot;, i.e. without any manipulation of page <br>tables. So all physical RAM has to live inside the 1GB virtual address <br>space of the kernel, together with some other stuff, like video buffers. <br> Thu, 11 Mar 2004 22:17:04 +0000 Virtual Memory I: the problem https://lwn.net/Articles/75447/ https://lwn.net/Articles/75447/ mmarkov <blockquote> If the kernel wishes to be able to access the system's physical memory directly, however, it must set up page tables which map that memory into the kernel's part of the address space. With the default 3GB/1GB mapping, the amount of physical memory which can be addressed in this way is somewhat less than 1GB - part of the kernel's space must be set aside for the kernel itself, for memory allocated with vmalloc(), and various other purposes. </blockquote> Honestly, I don't understand here why only 1GB is accessible under these premises. <p> PS Great article, Jon. In fact, great articles, both part I and part II. Thu, 11 Mar 2004 18:36:47 +0000 Altix https://lwn.net/Articles/75434/ https://lwn.net/Articles/75434/ corbet <blockquote> "<i>I thought SGI's Altix was able to handle a huge amount of memory. Does anyone know if SGI's kernel also uses the 4G/4G patch?</i>" </blockquote> <p> I do believe that Altix systems are Itanium-based, so they don't have to deal with all this obnoxious stuff. Thu, 11 Mar 2004 17:30:32 +0000 Virtual Memory I: the problem https://lwn.net/Articles/75432/ https://lwn.net/Articles/75432/ parimi Jon, Thanks for such an informative article! <p>I thought SGI's Altix was able to handle a huge amount of memory. Does anyone know if SGI's kernel also uses the 4G/4G patch? Thu, 11 Mar 2004 17:23:15 +0000 Virtual Memory I: the problem https://lwn.net/Articles/75344/ https://lwn.net/Articles/75344/ nix If that were true any given process would only be able to address a third of the physical RAM in the system (on a fully-populated non-highmem box).<p>This is considered silly, since process virtual memory requirements can be far higher than their physical requirements. :) Thu, 11 Mar 2004 11:51:51 +0000 Virtual Memory I: the problem https://lwn.net/Articles/75338/ https://lwn.net/Articles/75338/ axboe Nah, it is you who gets it backward. Thu, 11 Mar 2004 10:34:54 +0000 Virtual Memory I: the problem https://lwn.net/Articles/75328/ https://lwn.net/Articles/75328/ dale77 Yep, buy yourself an AMD64.<p>Perhaps one of these:<p>http://www.gamepc.com/shop/systemfamily.asp?family=gpdev<p>Dale Thu, 11 Mar 2004 09:06:40 +0000 Virtual Memory I: the problem https://lwn.net/Articles/75326/ https://lwn.net/Articles/75326/ dlang I think you have the 3:1 split backwards. as I understand it the kernel gets the 3G portion and userspace gets 1G.<p>there are patches to allow you to change it to 2G:2G and I believe I've seen either a 3:1 or a 2.5:1.5 (I don't remember which at the moment) but as you cut down the amount of address space available to the kernel other problems become more common. Thu, 11 Mar 2004 08:20:04 +0000 Virtual Memory I: the problem https://lwn.net/Articles/75311/ https://lwn.net/Articles/75311/ oconnorcjo I agree with Linus on this one. Opterons and AMD64 are out now and Intel will have an x86-64 in the next year or so. If you really need the RAM then one might as well get a 64 bit chip to go with it. Racking up the RAM on a 32 bit system is like stuffing 10 pounds of potatoes in a five pound bag. Thu, 11 Mar 2004 05:27:24 +0000