LWN: Comments on "Replacing x86 firmware with Linux and Go" https://lwn.net/Articles/738649/ This is a special feed containing comments posted to the individual LWN article titled "Replacing x86 firmware with Linux and Go". en-us Tue, 30 Sep 2025 13:13:43 +0000 Tue, 30 Sep 2025 13:13:43 +0000 https://www.rssboard.org/rss-specification lwn@lwn.net Replacing x86 firmware with Linux and Go https://lwn.net/Articles/805198/ https://lwn.net/Articles/805198/ l0k1verloren <div class="FormattedComment"> The least mature part of Go is the standard library. There is no doubt that much of its under-the-hood stuff and syntax helps avoid most of the bugs that lead to exploits (buffer overflows, code injection, and so on) but it's stated up front that this is aimed equally towards productivity and stability as it is to security.<br> <p> Go's use in quick-and-dirty and small applications usually written in an interpreted languages is a natural fit for a language that favours automation over manual hand coding, but its automation integration into the build system is poor and the modules are also very immature.<br> <p> A vector of attack that I suspect will be found in Go (standard library, to be precise) will come from mishandling of file handles or its lack of (easy) control of mutability and flaws in the work stealing scheduler. Go is an immature language system, to be sure, but ticks a lot of boxes.<br> <p> If you work with Go you would be aware that recently a lot of fixtures in the standard library are being replaced and extended, notably errors and several others.<br> <p> Go's main advantage is it focuses on the weaknesses of programmers and development management's tendencies towards over-elaboration, this is in itself in one whack wiping out a whole swathe of potential seecurity issues. But that is today secure, tomorrow there will always have to be more changes.<br> <p> I know in my code my most frequent bug type comes from scope shadowing, a problem solveable with static analysis tools though few exist for this problem yet.<br> <p> It is easy to criticise the rapid mutation of this young language but it is very accessible to especially the type of impatient, creative type of programmer who is obstructed from working with more formalised and complex language syntaxes like most other languages, without sacrificing readability. Problems will emerge quickly and be solved quickly in this stage of development.<br> <p> There will always be bugs but bug-blind programming practices are worse.<br> </div> Wed, 20 Nov 2019 13:35:48 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/740435/ https://lwn.net/Articles/740435/ erpalmer <div class="FormattedComment"> <p> The source for OpenPOWER boot firmware is indeed available in GitHub. See an overview of the components here <a href="https://www.ibm.com/developerworks/library/l-protect-system-firmware-openpower/index.html">https://www.ibm.com/developerworks/library/l-protect-syst...</a><br> <p> <p> </div> Fri, 01 Dec 2017 18:01:56 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/740392/ https://lwn.net/Articles/740392/ rahvin <div class="FormattedComment"> Given the patents were sold off first and aren't contained in the sale to the VC firm I'm not sure. Paying that much money for a dying architecture with no significant intellectual property without plans to get more licenses out there would be very un-VC. Imagination was always pretty half-hearted with MIPS and didn't seem to be willing to advance the platform by spending money fixing it's problems. Properly executing and spending money on design and development and creating a model more like ARM with good tools, available off the shelf designs and multiple license types with a particular focus on designs that are already done and tested would do much to revitalize MIPS and make it competitive again.<br> </div> Thu, 30 Nov 2017 23:55:37 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/740298/ https://lwn.net/Articles/740298/ arnd <div class="FormattedComment"> My impression is that they would have a harder time turning it around than Imagination, which seemed to actually try but failed to get any significant market wins. While MIPS cores still make up a significant portion of the the router market, I'm not aware of any recent product announcements, the manufacturers have either replaced the CPU cores with ARMv7 a few years ago and moved on to ARMv8 in 2017 (Broadcom, Qualcomm/Atheros, Mediatek/Ralink, Cavium), replaced them with x86 (Intel/Lantiq), or discontinued the product line (Realtek).<br> <p> The situation seems similar for architecture licensees (Cavium, Raza/Netlogic/Broadcom, Lexra/Realtek, Loongson, Ingenic, SiCortex), all of which seem to have stopped coming out with new MIPS based designs in the last few years.<br> </div> Thu, 30 Nov 2017 10:37:05 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/740263/ https://lwn.net/Articles/740263/ klossner <a href="https://www.google.com/patents/US4814976">That patent</a> was filed in 1986, so it is no longer of concern. Wed, 29 Nov 2017 20:05:11 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/740253/ https://lwn.net/Articles/740253/ rahvin MIPS ownership changed hands in 2017, it was sold to a VC firm. This may mean wider deployment and licensing, right now MIPS is primarily contained to routers and other embedded systems.<br><br> <font class="QuotedText"><blockquote>&gt;MIPS business is sold by Imagination Technologies to Tallwood Venture Capital as Tallwood MIPS Inc. for $65 million. [52]</blockquote></font><br> <a href="https://en.wikipedia.org/wiki/MIPS_Technologies">https://en.wikipedia.org/wiki/MIPS_Technologies</a> Wed, 29 Nov 2017 18:23:26 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739954/ https://lwn.net/Articles/739954/ joib <div class="FormattedComment"> <font class="QuotedText">&gt; From my talks with people from IBM and Google I have learned that Google is actually using large numbers of POWER servers in their infrastructure. </font><br> <p> Oh? That's cool. Obviously google have been a public member of the entire openpower thing, but I wasn't aware that they are actually running it in production in significant quantitites.<br> </div> Fri, 24 Nov 2017 19:58:35 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739928/ https://lwn.net/Articles/739928/ glaubitz <div class="FormattedComment"> <font class="QuotedText">&gt; Imagine if Google demanded Intel to produce binary-blob-free versions of their processors and Intel refused. What is Google going to do about it? Go to AMD and demand binary-blob-free versions of their processors and hope they comply? Migrate their server farms over to ARM processors?</font><br> <p> From my talks with people from IBM and Google I have learned that Google is actually using large numbers of POWER servers in their infrastructure. According to them, one of the main reasons why Debian has a POWER porr (ppc64el) is Google.<br> </div> Fri, 24 Nov 2017 12:28:11 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739925/ https://lwn.net/Articles/739925/ pityashian_sweatshopworker <div class="FormattedComment"> Some rambling talking:<br> <p> The final SMM base for each core is not always is constant. The SMM space is usually nearby other *stolen* memory spaces (like integrated GFX or ME) to make more available memory space to be continuous. The 0x30000 (hardware reset default) is used as a trampoline or temporary space to craft SMM context only. (Some old guy SMM base called as A-segment 0xA0000 which is nearby the VGA ROM, on the recent machine which is called as T segment, the T is referred as the 'T' in TOLUD possibly). <br> <p> About flash based SMM handler which is robuster than memory based specially with RAS slang, but the footprint size vs cost problem emerged. The more functionality make the footprint size to grow up. Even recent Intel ME (for serve product segment) also reside in the stolen memory instead of SRAM! Once server ME stop working, a lot of function of the *isolated* BMC will stop working too. <br> <p> I guessed bravely that prior to CPU/SMM context is initialized w/o any examination(maybe i am wrong), it seems unlikely SMM entry will be conducted for a CPU. Even in the more restrictive environment, STM maybe used to monitor SMM activities.<br> <p> A-bit off topic,a notorious and common problem of SMM security is that in some laptop implementation, it will disable the execution out of SMM space exception and then call video BIOS or GOP in SMM directly and roughly.<br> </div> Fri, 24 Nov 2017 11:13:15 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739927/ https://lwn.net/Articles/739927/ glaubitz <div class="FormattedComment"> <font class="QuotedText">&gt; Sparc is toast. Theoretically it could be resurrected.</font><br> <p> Meh, Oracle just recently released M8 and Fujitsu is still selling new servers.<br> <p> SPARC is also used by ESA in the form of Leon. Oracle is also still paying kernel developers to submit kernel patches for sparc64, so it's not really sure what the current plans are.<br> <p> Either way, Debian is still supporting sparc64 (I'm one of the porters).<br> </div> Fri, 24 Nov 2017 10:16:10 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739914/ https://lwn.net/Articles/739914/ mjg59 <div class="FormattedComment"> That doesn't write to the secure part of the variable store.<br> </div> Thu, 23 Nov 2017 21:03:00 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739908/ https://lwn.net/Articles/739908/ flussence <div class="FormattedComment"> <font class="QuotedText">&gt; I see no reason that the secure part of flash ever needs to be written after boot.</font><br> How about the efivars pstore driver? Saved me a lot of grey hair the last time my home server hit a kernel panic in the middle of the night, and I could actually diagnose it afterwards.<br> </div> Thu, 23 Nov 2017 19:31:07 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739886/ https://lwn.net/Articles/739886/ renox <div class="FormattedComment"> Not so open: I remember a lawsuit about a patent on a MIPS instruction..<br> That said the original MIPS ISA is very old so any patent on it should have expired..<br> </div> Thu, 23 Nov 2017 09:16:06 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739885/ https://lwn.net/Articles/739885/ joib <div class="FormattedComment"> Wikipedia says that Longsoon/ICT have bought a MIPS architecture license: <a href="https://en.wikipedia.org/wiki/Loongson#MIPS_patent_issues">https://en.wikipedia.org/wiki/Loongson#MIPS_patent_issues</a><br> </div> Thu, 23 Nov 2017 07:26:48 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739884/ https://lwn.net/Articles/739884/ eru <i>MIPS instruction set is free and open, and you can actually get completely free MIPS chips. However, it's not easy to find them.</i> <p> There is the Chinese MIPS-compatible Loongson. I recall at one point years ago RMS was said to use a Loongson-based laptop, because it was totally open. But seems to be discontinued: <a href="http://lemote.kd85.com/">http://lemote.kd85.com/</a> Thu, 23 Nov 2017 07:17:40 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739883/ https://lwn.net/Articles/739883/ Cyberax <div class="FormattedComment"> MIPS instruction set is free and open, and you can actually get completely free MIPS chips. However, it's not easy to find them.<br> </div> Thu, 23 Nov 2017 05:28:16 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739879/ https://lwn.net/Articles/739879/ drag <div class="FormattedComment"> Sparc is toast. Theoretically it could be resurrected. <br> <p> POWER is going strong, but it's very expensive. Technically it's a lot more open then X86_64. <a href="https://raptorcs.com/TALOSII/">https://raptorcs.com/TALOSII/</a><br> <p> ARM itself is technically closed, but at least companies have the option to purchase a license. I like ARM because it's free and you can still get binary blob-free ARM computers. The 'bootloader' in most ARM systems provide the same functionality that UEFI and such things do on X86_64. You can have complete control over the cpu from voltage-on up. Graphic drivers remain problematic, but are not strictly needed for basic function. Small and slow systems though. I don't know about the attempts to create server versions. <br> <p> I don't know about MIPS. Probably in the same boat as ARM, but ARM is generally more competitive in the market place. <br> </div> Thu, 23 Nov 2017 02:17:43 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739878/ https://lwn.net/Articles/739878/ khim <blockquote><font class="QuotedText">Migrate their server farms over to ARM processors?</font></blockquote> <p>Well, ARM, POWER, or MIPS. I don't think SPARC is viable anymore. Although I'm not sure ARM is better from "blob-free" POV. How are POWER and MIPS in that regard? I have no idea, actually. Thu, 23 Nov 2017 01:50:01 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739877/ https://lwn.net/Articles/739877/ pbonzini <div class="FormattedComment"> Even if you have a chain of trust to the kexec-ed Linux, it isn't necessarily fine for it to do arbitrary accesess the key store (or at least, in the UEFI trust model, it's not).<br> <p> If it's not, you need some "trusted" code to survive from the pre-kexec environment, in order to validate accesses to flash. <br> <p> <font class="QuotedText">&gt; And a little anecdote is default UEFI SMM handler always bright up other core APs into SMM synchronously (the CPU troop is spining and waiting). </font><br> <p> Yup, in fact port 0xB2 gets all cores into SMM. We tried avoiding that for KVM's implementation of SMM (which is only used for UEFI secure boot), but we kept finding bugs in Tiano Core and finally decided to get the thundering herd of CPUs into SMM just like on bare metal. :( But we still do not support hotplug with secure boot because Tiano Core lacks the required SMM magic (Intel hasn't open sourced it yet).<br> </div> Wed, 22 Nov 2017 23:52:10 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739860/ https://lwn.net/Articles/739860/ drag <div class="FormattedComment"> <font class="QuotedText">&gt; Google should have the market power to force Intel to sell processors with the ME physically disabled. </font><br> <p> Google's 'market power' is being expressed in these sorts of projects that help get Chromebooks running with Coreboot and such things. <br> <p> <font class="QuotedText">&gt; partner with Amazon, Facebook, Microsoft and the other cloud providers to demand CPU's with the ME disabled.</font><br> <p> Believe it or not features like ME and vPro are actually _selling points_. Intel didn't add these features out of eviliness, having lights off management and back doors into computers is valuable features for people running large numbers of desktops and other systems. They can use them to help enforce corporate policy and such things.<br> <p> This is what you get when you deal with closed source software. <br> <p> These features are valuable, but unless they are open source then they are evil. <br> <p> <font class="QuotedText">&gt; It bothers me greatly that Google and other cloud providers don't use this market purchasing power if they value the ME being fully disabled. </font><br> <p> Being a big customer does not give you godlike powers over another person's business by itself. If you want to have clout in purchasing decisions you have to have the ability to go and use competator's products. <br> <p> Imagine if Google demanded Intel to produce binary-blob-free versions of their processors and Intel refused. What is Google going to do about it? Go to AMD and demand binary-blob-free versions of their processors and hope they comply? Migrate their server farms over to ARM processors? <br> <p> Markets are self-regulating, but only if there is substantial competition. IP laws and such things limit competition and thus limit the ability for people to demand large corporations to obey. Production of unencumbered processors like RISC-V is the ultimate 'out' for this thing and if they are successful will solve these sorts of regulatory issues, but in the meantime Intel is only going to care if it costs them customers. <br> <p> Hopefully AMD takes the hint.<br> </div> Wed, 22 Nov 2017 16:41:29 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739824/ https://lwn.net/Articles/739824/ cortana If you run the installer in advanced mode, you can choose to not install any boot loader. Otherwise you can simply the <tt>grub-pc</tt> or <tt>grub-efi-amd53</tt> packages. Wed, 22 Nov 2017 14:46:10 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739810/ https://lwn.net/Articles/739810/ nim-nim <div class="FormattedComment"> It's not extensible but it ships with a compiler… WTF.<br> <p> The Go ecosystem produces wonderful apps, but they need to fix their ship to production story. Piling up massive amounts of intertwined Go modules with no release discipline, massive forking and wheel reinvention, last-mile compilation of this mass in a single static binary, only goes so far. Security researchers are going to have a field day if Go software escapes the world of GitHub-plugged devs.<br> <p> Go is only escaping black marks because there are few public Go deployments where everything is not continuously rebuilt (Not that the result is secure, it's just too mutating to be easily audited, so researchers have chosen to look elsewhere so far. Remember when they decided to look at Java and uncovered pervasive years-old vulnerabilities?).<br> </div> Wed, 22 Nov 2017 08:26:15 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739807/ https://lwn.net/Articles/739807/ MakeHinduGreateAgain <div class="FormattedComment"> I thought the better description is that install my customer SMM handler in Linux payload (As <a rel="nofollow" href="https://github.com/rminnich/linux/commits/monitor">https://github.com/rminnich/linux/commits/monitor</a>). The RAS related function code is resident in SMM and some of the registers are SMM access only if my memory is correct.<br> <br> And a little anecdote is default UEFI SMM handler always bright up other core APs into SMM synchronously (the CPU troop is spining and waiting). If you have more AP cores, the more latency you will get. (Although there are some security implication here). A modern server machine has at least twelve cores. There will be some performance and latency issue.<br> </div> Wed, 22 Nov 2017 06:45:01 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739798/ https://lwn.net/Articles/739798/ ThinkRob <div class="FormattedComment"> AFAIK this doesn't work for laptops where Boot Guard is enabled and enforcing using the keys burned in during board manufacture. <br> <p> I have an X230 running coreboot w/ a stripped + HAPd ME, but with subsequent ThinkPads actually modifying the ME seems to cause Boot Guard to brick the whole system. And since the key is supposedly OEM-specific and burned into the chipset (CPU?) itself, it's not like you can replace it yourself. <br> <p> What I *don't* know is if setting the HAP bit but leaving the rest of the ME image the same will trigger Boot Guard's hissy fit.<br> <p> (The above is based on my understanding of Boot Guard, which may be comically wrong. Please correct if it is!)<br> </div> Wed, 22 Nov 2017 00:32:10 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739796/ https://lwn.net/Articles/739796/ pbonzini <div class="FormattedComment"> I forgot a sentence: 0x30000 doesn't point into flash, so you need to bring everyone in SMM when the newly-hotplugged CPU does SMBASE relocation.<br> </div> Wed, 22 Nov 2017 00:04:10 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739795/ https://lwn.net/Articles/739795/ pbonzini <div class="FormattedComment"> It's certainly possible, the problem is that 0x30000 doesn't point into flash. :(<br> <p> Defaulting SMBASE to 0xA0000 would have made a lot more sense.<br> </div> Wed, 22 Nov 2017 00:02:54 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739792/ https://lwn.net/Articles/739792/ rahvin <div class="FormattedComment"> I commend your work but the question I've been asking all along is why is this necessary? Google should have the market power to force Intel to sell processors with the ME physically disabled. And even if Google alone doesn't have the market power they should be able to partner with Amazon, Facebook, Microsoft and the other cloud providers to demand CPU's with the ME disabled.<br> <p> It bothers me greatly that Google and other cloud providers don't use this market purchasing power if they value the ME being fully disabled. Google purchase millions of servers a year and combined with the other cloud providers you constitute a major portion of the server market, I'd guess near 50% or higher. The cloud providers have the power to effect Intel directly and have not acted when the ME is a security threat of unknown proportion. <br> <p> There are already blackhat exploits to provision the ME with user access to the system. Right now these attacks require user access but as well all know user access can quickly become remote access as the vulnerability is probed and more information comes to light. The ME is a massive security threat and if the cloud providers care about security they should be doing everything in their power to see processors without the ME made available.<br> </div> Tue, 21 Nov 2017 23:22:34 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739786/ https://lwn.net/Articles/739786/ luto <div class="FormattedComment"> True, although adding a whole microcontroller would cost more than just an I2C flash chip. The only service that I think is really needed is some NVRAM that can be written outside SMM to queue up variable writes. I don't know whether current Intel chips can lock down part of boot flash while leaving some unlocked.<br> <p> <font class="QuotedText">&gt; The OS could overwrite 0x30000 and gain access to SMRAM. "Why 0x30000?" is near the top of my list of x86 unanswered questions, even higher than "What the heck was CR1?".</font><br> <p> I've never understood why the reset/SIPI vectors and the default SMBASE don't point to addresses that are unconditionally in the boot flash. I guess that all that's really needed is the ability to securely run something from flash before any OS code can possibly execute on a newly hot plugged CPU. Is this not actually possible without kicking all CPUs into SMM before powering up a new CPU?<br> </div> Tue, 21 Nov 2017 22:08:55 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739781/ https://lwn.net/Articles/739781/ pbonzini <div class="FormattedComment"> Well, if you can throw additional hardware at the task that's certainly a possibility. :-) Instead of a second I2C flash you could also delegate UEFI variable services and APEI to a microcontroller (also on SMBus). <br> <p> Oh, and there's actually another thing that SMM does, which is orchestrating CPU hotplug. And that's an ugly one because, due to the asinine default choice of SMBASE made in the 386SL(*), it's the only case that really, really needs to bring *all* processors at the same time on SMM.<br> <p> (*) The OS could overwrite 0x30000 and gain access to SMRAM. "Why 0x30000?" is near the top of my list of x86 unanswered questions, even higher than "What the heck was CR1?".<br> </div> Tue, 21 Nov 2017 21:06:41 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739762/ https://lwn.net/Articles/739762/ cyphar <div class="FormattedComment"> You can use me_cleaner in both the "remove as many modules as possible" and "enable HAP / MeDisable bit" modes -- which should reduce your concerns. This is what I've done on my X220, and I believe it is what Purism is doing for their new laptops.<br> </div> Tue, 21 Nov 2017 18:25:42 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739754/ https://lwn.net/Articles/739754/ luto <div class="FormattedComment"> I don't really buy this. I see no reason that the secure part of flash ever needs to be written after boot. A high quality implementation of UEFI should be able to queue up variable writes such that the next boot will find them, validate them, and apply them before ever executing code off the disk.<br> <p> I'm not at all sure that Intel's flash hardware can do this, but it's surely doable with a second plain I2C flash chip on the system SMBUS.<br> </div> Tue, 21 Nov 2017 16:47:16 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739730/ https://lwn.net/Articles/739730/ flussence <div class="FormattedComment"> That's true, though there is a really good static linter for bash/sh, shellcheck. I try to write good shell scripts and yet it still catches an awful lot of mistakes.<br> <p> If someone gets better results by using Go (or dmd-run, or perl, or whatever), more power to them.<br> </div> Tue, 21 Nov 2017 16:36:08 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739725/ https://lwn.net/Articles/739725/ jond <div class="FormattedComment"> <font class="QuotedText">&gt; That's true, but the point was, I think, that it's not hard or cumbersome to write reliable bash scripts. </font><br> <p> I've been writing (what I hope are, at this point, reliable) bash scripts for an embarrassingly long amount of my professional career, as well as my hobby stuff, and I couldn't disagree with this more. It's fiendishly hard to do it well.<br> </div> Tue, 21 Nov 2017 15:21:29 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739719/ https://lwn.net/Articles/739719/ merge <div class="FormattedComment"> sorry, my comment was off-topic. I assumed you run coreboot.<br> </div> Tue, 21 Nov 2017 14:42:01 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739718/ https://lwn.net/Articles/739718/ merge <div class="FormattedComment"> That's no problem. I always configure coreboot to use the latest SeaBIOS as payload, so far.<br> <p> In my case, it'd be even better use GRUB instead, and don't install GRUB via Debian on disk. I simply haven't had the time to dig in. Are there any nice posts about coreboot+GRUB and how to install and configure Debian without GRUB, and how to maintain grub's config files on disk?<br> <p> I guess there are even less GRUB releases as there are SeaBIOS releases that would make me want to re-flash :)<br> </div> Tue, 21 Nov 2017 14:38:51 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739715/ https://lwn.net/Articles/739715/ mirabilos <div class="FormattedComment"> Would be happy to replace the ME on my IBM Thinkpad… but only with something that then provides seabios to the to-be-booted operating system on the main CPU, so I can boot DOS, OS/2, old-style BSD, etc. as well.<br> </div> Tue, 21 Nov 2017 14:09:51 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739711/ https://lwn.net/Articles/739711/ abo <div class="FormattedComment"> That's true, but the point was, I think, that it's not hard or cumbersome to write reliable bash scripts. bash is a domain specific language for calling open(), dup(), fork(), exec() etc., so naturally it's not very useful without something to exec() into.<br> <p> </div> Tue, 21 Nov 2017 12:46:35 +0000 For further reading https://lwn.net/Articles/739710/ https://lwn.net/Articles/739710/ danpb <div class="FormattedComment"> But don't expect this will be the end of it. With the level of complexity in the firmware, and its increased profile amongst security researchers, there's no reason to expect it will fair better than any other comparative software out there. IOW, it is reasonable to expect a steady stream of security vulnerabilities being reported for years to come... :-(<br> </div> Tue, 21 Nov 2017 12:33:12 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739709/ https://lwn.net/Articles/739709/ joib <div class="FormattedComment"> Yes, ARM servers will feature UEFI and ACPI. See <a href="https://lwn.net/Articles/584123/">https://lwn.net/Articles/584123/</a><br> <p> The relevant ARM standards are called SBSA (Server Base System Architecture) and SBBR (Server Base Boot Requirements).<br> <p> Interestingly, it seems OpenPOWER uses something pretty similar to NERF called 'petitboot'; a simple (well, compared to UEFI at least) firmware that loads a Linux kernel + userspace from the flash rom, that system then kexec()'s the final distro kernel.<br> </div> Tue, 21 Nov 2017 12:10:08 +0000 Replacing x86 firmware with Linux and Go https://lwn.net/Articles/739696/ https://lwn.net/Articles/739696/ hugelgupf <div class="FormattedComment"> I think it's worth mentioning here that Go is absolutely not mandatory to this project. The Linux-in-firmware component (which we have started calling LinuxBoot) can go with whatever userspace you like -- we just happen to use a small Go-based busybox-like initramfs.<br> </div> Tue, 21 Nov 2017 06:33:54 +0000