LWN: Comments on "User-space RCU: Memory-barrier menagerie"

User-space RCU: Memory-barrier menagerie

PaulMcKenney — Fri, 15 Nov 2013 20:37:15 +0000

Glad you like it!

On Dekker, there are no more forward-progress guarantees than for any other scenario. To see this, consider that once CPU 0 and CPU 1 complete execution of the Dekker scenario, then at least one of them will have seen the other's store. Note that Scenario 15 has a similar guarantee: once both CPUs complete execution, then at least one of x and y will have the value 2.

Of course, the guarantee provided by the Dekker scenario is well-suited to mutual exclusion, but on the other hand I much prefer atomic operations. ;–)

User-space RCU: Memory-barrier menagerie

chantecode — Fri, 15 Nov 2013 01:30:19 +0000

Excellent document. I've been waiting for such thorough reference on the various possible ordering and their expected guarantees. There is Documentation/memory-barrier.txt but I don't remember seeing the Dekker and inverted Dekker examples inside.

Also I'm still confused about the guarantee provided by Dekker, because it's the only barrier that seem to guarantee a state machine forward progress, which I can't manage to understand why. But at least I know the effect of its ordering now, heh I have to start somewhere...

-- Frederic