| From: |
| Ziyue Zhang <quic_ziyuzhan-AT-quicinc.com> |
| To: |
| vkoul-AT-kernel.org, kishon-AT-kernel.org, robh+dt-AT-kernel.org, manivannan.sadhasivam-AT-linaro.org, bhelgaas-AT-google.com, kw-AT-linux.com, lpieralisi-AT-kernel.org, quic_qianyu-AT-quicinc.com, conor+dt-AT-kernel.org, neil.armstrong-AT-linaro.org, andersson-AT-kernel.org, konradybcio-AT-kernel.org |
| Subject: |
| [PATCH v2 0/6] pci: qcom: Add QCS615 PCIe support |
| Date: |
| Fri, 22 Nov 2024 10:02:59 +0800 |
| Message-ID: |
| <20241122020305.1584577-1-quic_ziyuzhan@quicinc.com> |
| Cc: |
| quic_tsoni-AT-quicinc.com, quic_shashim-AT-quicinc.com, quic_kaushalk-AT-quicinc.com, quic_tdas-AT-quicinc.com, quic_tingweiz-AT-quicinc.com, quic_aiquny-AT-quicinc.com, kernel-AT-quicinc.com, linux-arm-msm-AT-vger.kernel.org, devicetree-AT-vger.kernel.org, linux-kernel-AT-vger.kernel.org, linux-phy-AT-lists.infradead.org, Ziyue Zhang <quic_ziyuzhan-AT-quicinc.com>, Krishna chaitanya chundru <quic_krichai-AT-quicinc.com> |
| Archive-link: |
| Article |
This series adds document, phy, configs support for PCIe in QCS615.
Base DT:
https://lore.kernel.org/all/20241104-add_initial_support_...
APPS SMMU:
https://lore.kernel.org/all/20241105032107.9552-1-quic_qq...
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
---
Have folling changes:
- Add compatible and phy compatible for qcs615 platform.
- Add support for GEN3 x1 PCIe PHY found on Qualcomm QCS615 platform.
- Add a new Document the QCS615 PCIe Controller
- Add the compatible for QCS615 PCIe controller.
- Add configurations in devicetree for PCIe, including registers, clocks, interrupts and phy setting sequence.
- Add configurations in devicetree for PCIe, platform related gpios, PMIC regulators, etc.
Changes in v2:
- Update commit message for qcs615 phy
- Update qcs615 phy, using lowercase hex
- Removed redundant function
- split the soc dtsi and the platform dts into two changes
- Link to v1: https://lore.kernel.org/all/20241118082619.177201-1-quic_...
Krishna chaitanya chundru (5):
dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the QCS615 QMP
PCIe PHY Gen3 x1
phy: qcom: qmp: Add phy register and clk setting for QCS615 PCIe
dt-bindings: PCI: qcom: Document the QCS615 PCIe Controller
PCI: qcom: Add QCS615 PCIe support
arm64: dts: qcom: qcs615: enable pcie for qcs615 board dts
Ziyue Zhang (1):
arm64: dts: qcom: qcs615: enable pcie for qcs615 soc
.../bindings/pci/qcom,pcie-qcs615.yaml | 161 ++++++++++++++++++
.../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 2 +
arch/arm64/boot/dts/qcom/qcs615-ride.dts | 42 +++++
arch/arm64/boot/dts/qcom/qcs615.dtsi | 158 +++++++++++++++++
drivers/pci/controller/dwc/pcie-qcom.c | 1 +
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 105 ++++++++++++
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h | 1 +
7 files changed, 470 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie-qcs615.yaml
base-commit: ee5d1329f3de0b8cb77084715c1179627a9d599c
--
2.34.1
