| From: |
| Sean Anderson <sean.anderson-AT-linux.dev> |
| To: |
| Lorenzo Pieralisi <lpieralisi-AT-kernel.org>, Krzysztof Wilczyński <kw-AT-linux.com>, Rob Herring <robh-AT-kernel.org>, linux-pci-AT-vger.kernel.org |
| Subject: |
| [PATCH v4 0/7] PCI: xilinx-nwl: Add phy support |
| Date: |
| Fri, 31 May 2024 12:13:30 -0400 |
| Message-ID: |
| <20240531161337.864994-1-sean.anderson@linux.dev> |
| Cc: |
| Thippeswamy Havalige <thippeswamy.havalige-AT-amd.com>, linux-arm-kernel-AT-lists.infradead.org, Markus Elfring <Markus.Elfring-AT-web.de>, Dan Carpenter <dan.carpenter-AT-linaro.org>, linux-kernel-AT-vger.kernel.org, Bjorn Helgaas <bhelgaas-AT-google.com>, Michal Simek <michal.simek-AT-amd.com>, Sean Anderson <sean.anderson-AT-linux.dev>, Bharat Kumar Gogada <bharat.kumar.gogada-AT-xilinx.com>, Bharat Kumar Gogada <bharatku-AT-xilinx.com>, Bjorn Helgaas <helgaas-AT-kernel.org>, Conor Dooley <conor+dt-AT-kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt-AT-linaro.org>, Lorenzo Pieralisi <lorenzo.pieralisi-AT-arm.com>, Michal Simek <michal.simek-AT-xilinx.com>, devicetree-AT-vger.kernel.org |
| Archive-link: |
| Article |
Add phy subsystem support for the xilinx-nwl PCIe controller. This
series also includes several small fixes and improvements.
Changes in v4:
- Clarify dt-bindings commit subject/message
- Explain likely effects of the off-by-one error
- Trim down UBSAN backtrace
- Move if to after pci_host_probe
- Remove if in err_phy
- Fix error path in phy_enable skipping the first phy
- Disable phys in reverse order
- Use dev_err instead of WARN for errors
Changes in v3:
- Document phys property
- Expand off-by-one commit message
Changes in v2:
- Remove phy-names
- Add an example
- Get phys by index and not by name
Sean Anderson (7):
dt-bindings: pci: xilinx-nwl: Add phys property
PCI: xilinx-nwl: Fix off-by-one in IRQ handler
PCI: xilinx-nwl: Fix register misspelling
PCI: xilinx-nwl: Rate-limit misc interrupt messages
PCI: xilinx-nwl: Clean up clock on probe failure/removal
PCI: xilinx-nwl: Add phy support
arm64: zynqmp: Add PCIe phys
.../bindings/pci/xlnx,nwl-pcie.yaml | 7 +
.../boot/dts/xilinx/zynqmp-zcu102-revA.dts | 1 +
drivers/pci/controller/pcie-xilinx-nwl.c | 139 +++++++++++++++---
3 files changed, 124 insertions(+), 23 deletions(-)
--
2.35.1.1320.gc452695387.dirty
