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KVM: arm64: nv: Shadow stage-2 page table handling

From:  Marc Zyngier <maz-AT-kernel.org>
To:  kvmarm-AT-lists.linux.dev, kvm-AT-vger.kernel.org, linux-arm-kernel-AT-lists.infradead.org
Subject:  [PATCH v2 00/16] KVM: arm64: nv: Shadow stage-2 page table handling
Date:  Wed, 29 May 2024 15:56:12 +0100
Message-ID:  <20240529145628.3272630-1-maz@kernel.org>
Cc:  James Morse <james.morse-AT-arm.com>, Suzuki K Poulose <suzuki.poulose-AT-arm.com>, Oliver Upton <oliver.upton-AT-linux.dev>, Zenghui Yu <yuzenghui-AT-huawei.com>, Joey Gouly <joey.gouly-AT-arm.com>, Alexandru Elisei <alexandru.elisei-AT-arm.com>, Christoffer Dall <christoffer.dall-AT-arm.com>, Ganapatrao Kulkarni <gankulkarni-AT-os.amperecomputing.com>
Archive-link:  Article

Here's the second version of the shadow stage-2 handling for NV
support on arm64.

* From v1 [1]

  - Reworked the allocation of shadow S2 structures at init time to be
    slightly clearer

  - Lots of small cleanups

  - Rebased on v6.10-rc1

[1] https://lore.kernel.org/r/20240409175448.3507472-1-maz@ke...

Christoffer Dall (2):
  KVM: arm64: nv: Implement nested Stage-2 page table walk logic
  KVM: arm64: nv: Unmap/flush shadow stage 2 page tables

Marc Zyngier (14):
  KVM: arm64: nv: Support multiple nested Stage-2 mmu structures
  KVM: arm64: nv: Handle shadow stage 2 page faults
  KVM: arm64: nv: Add Stage-1 EL2 invalidation primitives
  KVM: arm64: nv: Handle EL2 Stage-1 TLB invalidation
  KVM: arm64: nv: Handle TLB invalidation targeting L2 stage-1
  KVM: arm64: nv: Handle TLBI VMALLS12E1{,IS} operations
  KVM: arm64: nv: Handle TLBI ALLE1{,IS} operations
  KVM: arm64: nv: Handle TLBI IPAS2E1{,IS} operations
  KVM: arm64: nv: Handle FEAT_TTL hinted TLB operations
  KVM: arm64: nv: Tag shadow S2 entries with guest's leaf S2 level
  KVM: arm64: nv: Invalidate TLBs based on shadow S2 TTL-like
    information
  KVM: arm64: nv: Add handling of outer-shareable TLBI operations
  KVM: arm64: nv: Add handling of range-based TLBI operations
  KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations

 arch/arm64/include/asm/esr.h         |   1 +
 arch/arm64/include/asm/kvm_asm.h     |   2 +
 arch/arm64/include/asm/kvm_emulate.h |   1 +
 arch/arm64/include/asm/kvm_host.h    |  36 ++
 arch/arm64/include/asm/kvm_mmu.h     |  26 +
 arch/arm64/include/asm/kvm_nested.h  | 127 +++++
 arch/arm64/include/asm/sysreg.h      |  17 +
 arch/arm64/kvm/arm.c                 |  11 +
 arch/arm64/kvm/hyp/vhe/switch.c      |  51 +-
 arch/arm64/kvm/hyp/vhe/tlb.c         | 147 +++++
 arch/arm64/kvm/mmu.c                 | 211 ++++++--
 arch/arm64/kvm/nested.c              | 780 ++++++++++++++++++++++++++-
 arch/arm64/kvm/reset.c               |   6 +
 arch/arm64/kvm/sys_regs.c            | 398 ++++++++++++++
 14 files changed, 1773 insertions(+), 41 deletions(-)

-- 
2.39.2


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