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Another round of speculative-execution vulnerabilities

Another round of speculative-execution vulnerabilities

Posted Aug 9, 2023 17:01 UTC (Wed) by eharris (guest, #144549)
Parent article: Another round of speculative-execution vulnerabilities

Confused by the discussion here about ON-CHIP transmission speeds.
...because I thought that modern multi-core chips need to talk to SHARED main memory housed across the bus in completely separate cards.....so maybe 10 centimeters away from the CPU chip.
*
Someone here can no doubt clear up my confusion.


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Another round of speculative-execution vulnerabilities

Posted Aug 9, 2023 17:28 UTC (Wed) by mb (subscriber, #50428) [Link]

That's exactly why there are multiple layers of cache. Each layer physically and architecturally closer to the core.

And also pre-fetching so that the slow memory access can happen while the CPU is doing other calculations.


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