| From: |
| Johnson Wang <johnson.wang-AT-mediatek.com> |
| To: |
| <robh+dt-AT-kernel.org>, <krzysztof.kozlowski+dt-AT-linaro.org>, <angelogioacchino.delregno-AT-collabora.com>, <sboyd-AT-kernel.org> |
| Subject: |
| [PATCH 0/4] Introduce MediaTek frequency hopping driver |
| Date: |
| Wed, 31 Aug 2022 20:48:46 +0800 |
| Message-ID: |
| <20220831124850.7748-1-johnson.wang@mediatek.com> |
| Cc: |
| <linux-clk-AT-vger.kernel.org>, <linux-kernel-AT-vger.kernel.org>, <devicetree-AT-vger.kernel.org>, <linux-arm-kernel-AT-lists.infradead.org>, <linux-mediatek-AT-lists.infradead.org>, <Project_Global_Chrome_Upstream_Group-AT-mediatek.com>, Johnson Wang <johnson.wang-AT-mediatek.com> |
| Archive-link: |
| Article |
Introduce MediaTek frequency hopping and spread spectrum clocking control
for MT8186.
Johnson Wang (4):
clk: mediatek: Export PLL operations symbols
dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency
hopping
clk: mediatek: Add new clock driver to handle FHCTL hardware
clk: mediatek: Change PLL register API for MT8186
.../bindings/arm/mediatek/mediatek,fhctl.yaml | 49 ++++
drivers/clk/mediatek/Makefile | 2 +-
drivers/clk/mediatek/clk-fhctl.c | 258 +++++++++++++++++
drivers/clk/mediatek/clk-fhctl.h | 27 ++
drivers/clk/mediatek/clk-mt8186-apmixedsys.c | 65 ++++-
drivers/clk/mediatek/clk-pll.c | 84 +++---
drivers/clk/mediatek/clk-pll.h | 56 ++++
drivers/clk/mediatek/clk-pllfh.c | 271 ++++++++++++++++++
drivers/clk/mediatek/clk-pllfh.h | 81 ++++++
9 files changed, 839 insertions(+), 54 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml
create mode 100644 drivers/clk/mediatek/clk-fhctl.c
create mode 100644 drivers/clk/mediatek/clk-fhctl.h
create mode 100644 drivers/clk/mediatek/clk-pllfh.c
create mode 100644 drivers/clk/mediatek/clk-pllfh.h
--
2.18.0
