Stuffing the return stack buffer [LWN.net]

Stuffing the return stack buffer

Posted Jul 23, 2022 14:15 UTC (Sat) by jhoblitt (subscriber, #77733)
Parent article: Stuffing the return stack buffer

What are the odds that a microcode update could disable falling back on "other heuristics" when the RSB is exhausted?

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Stuffing the return stack buffer

Posted Jul 23, 2022 14:42 UTC (Sat) by tglx (subscriber, #31301) [Link] (3 responses)

Exactly zero. If that would be feasible we would not discuss such a workaround at all.

Stuffing the return stack buffer

Posted Jul 23, 2022 19:13 UTC (Sat) by jhoblitt (subscriber, #77733) [Link] (2 responses)

That isn't surprising... even if a heroic microcode fix was possible, there is obviously a strong financial incentive to push customers towards purchasing new chips (which already have a, presumably, well validated mitigation).

I genuinely appreciate the effort and wizardry going into this problem. I suspect many are in the position of considering risk and evaluating which hosts need retbleed mitigation... and which subset of those can't afford a 1/3 loss of capacity.

It is looking like the ultimate solution is either to buy more hardware to compensate for increased kernel overhead or to upgrade to Intel "12th" gen or newer cpus with eIBRS support? Either option is difficult with the current unprecedented lead times on IT equipment.

Of course, I accepted delivery of 5 pallets of zen3 based servers immediately prior to the public retbleed disclosure.

Stuffing the return stack buffer

Posted Jul 27, 2022 15:01 UTC (Wed) by anton (subscriber, #25547) [Link] (1 responses)

Actually it is somewhat surprising. CPU designer often put in "chicken bits" for disabling new microarchitectural features, in case they turn out to be buggy. You can then still sell the CPU instead of having to scrap it. And some of these chicken bits have been known to be used over the years (and probably many more were used before the CPUs were released, and the public never heard of them).

But when they designed this fallback from the return stack buffer to the history-based indirect branch predictor into Skylake, they apparently did not put a chicken bit for that in, probably because history-based indirect branch prediction had been present in Intel CPUs for many generations.

Stuffing the return stack buffer

Posted Jul 27, 2022 20:53 UTC (Wed) by izbyshev (subscriber, #107996) [Link]

> CPU designer often put in "chicken bits" for disabling new microarchitectural features, in case they turn out to be buggy.

Yeah, like this one :)

Stuffing the return stack buffer

Posted Jul 24, 2022 0:32 UTC (Sun) by developer122 (guest, #152928) [Link]

Microcode is not all-powerful. Certain key mechanisms must be hardwired for performance reasons.