Stuffing the return stack buffer [LWN.net]

Stuffing the return stack buffer

Posted Jul 23, 2022 0:40 UTC (Sat) by scientes (guest, #83068)
Parent article: Stuffing the return stack buffer

The real another way is to have the time dimension part of the ISA:

Prevention of Microarchitectural Covert Channels on an Open-Source 64-bit RISC-V Core

Such as with this suggested new instruction, part of seL4 development.

to post comments

Stuffing the return stack buffer

Posted Jul 23, 2022 14:41 UTC (Sat) by Paf (subscriber, #91811) [Link] (4 responses)

“ We show that the addition of a single-instruction extension to the RISC-V ISA, that flushes microarchitectural state,”

That doesn’t sound like including the time domain…? It’s just flushing all state at certain transitions?

Stuffing the return stack buffer

Posted Jul 23, 2022 14:47 UTC (Sat) by Paf (subscriber, #91811) [Link] (3 responses)

Specifically, at context switches. So this looks to be only truly applicable on a system where cores are entirely independent or there’s just one core. This looks like a very limited mitigation and not much applicable to the larger cores we work with. It also relies on knowing what “all micro architecture state” is - part of the steady march of these issues has been people finding things that weren’t previously recognized as “state” worthy of protecting.

Stuffing the return stack buffer

Posted Jul 23, 2022 16:26 UTC (Sat) by epa (subscriber, #39769) [Link]

...or somehow you arrange for all the cores sharing a cache to be running code from the same protection domain at the same time. When one context switches to a different user or to the kernel, they all must.

Stuffing the return stack buffer

Posted Jul 24, 2022 20:19 UTC (Sun) by Sesse (subscriber, #53779) [Link] (1 responses)

So all your syscalls are now basically as expensive as you can possibly make them?

Stuffing the return stack buffer

Posted Jul 24, 2022 23:03 UTC (Sun) by Paf (subscriber, #91811) [Link]

I mean, they talk about how to make that specific operation more efficient and it could be worse, but …….. yes.

Stuffing the return stack buffer

Posted Aug 2, 2022 17:13 UTC (Tue) by immibis (subscriber, #105511) [Link]

"have the time dimension part of the ISA" is a rather pretentious way of saying "add an instruction to flush cached microarchitectural state"