Why RISC-V doesn't (yet) support KVM

Is it shipping *systems* or *chips* that don't exist yet?
Presumably those developing this feature are testing it on something.

If the chips exist just no one is selling systems with them yet (presumably the developers having custom prototype boards) then I see no reason not to merge the feature as the chips aren't going to change.

OTOH if no chips exist yet (eg if prototyping is being done on a FPGA) I can see the rational for waiting if there is a real risk that the final hardware is different.
But even in this case does it really matter given that the user space won't be affected? Sure the kernel code may have to change for the final hardware but if the prototype hardware never shipped does this matter as there will be no need to support both in the kernel.

I may be missing something obvious here as I'm not well versed in RISC V