| From: |
| Miquel Raynal <miquel.raynal-AT-bootlin.com> |
| To: |
| Rob Herring <robh+dt-AT-kernel.org>, Mark Rutland <mark.rutland-AT-arm.com>, <devicetree-AT-vger.kernel.org>, Richard Weinberger <richard-AT-nod.at>, Vignesh Raghavendra <vigneshr-AT-ti.com>, Tudor Ambarus <Tudor.Ambarus-AT-microchip.com>, <linux-mtd-AT-lists.infradead.org> |
| Subject: |
| [PATCH v3 0/8] New Arasan NAND controller driver |
| Date: |
| Thu, 7 May 2020 13:00:26 +0200 |
| Message-ID: |
| <20200507110034.14736-1-miquel.raynal@bootlin.com> |
| Cc: |
| Thomas Petazzoni <thomas.petazzoni-AT-bootlin.com>, Boris Brezillon <boris.brezillon-AT-collabora.com>, Michal Simek <monstr-AT-monstr.eu>, Naga Sureshkumar Relli <nagasure-AT-xilinx.com>, Miquel Raynal <miquel.raynal-AT-bootlin.com> |
| Archive-link: |
| Article |
New Arasan NAND controller driver
Hello,
This is a deep rework of Naga's Arasan NAND controller driver. This
version is the final version and works with software ECC. It relies on
a previous series called "Supporting restricted NAND controllers" that
brings more flexibility to the NAND with the goal to support
restricted controllers like this one.
Cheers,
Miquèl
Changes in v3:
* Prefix specific clock definitions with XLNX as they do not apply for
any other SoC and are attached to a single compatible.
* Used field getters/setters as defined in bitfield.h.
* Force casting to u32 before shifting u8 values by 8 16 or 24 bits.
* Comply with the recent core changes and select manually
nand_monolithic_read/write_page_raw() helpers.
* Add MAINTAINER patch.
* Add a bit extraction helper in the core.
* Rename BCH functions.
* Add a swapping bit mechanism to BCH.
* Support the hardware ECC engine.
Changes in v2:
* Working ->exec_op() implementation relying on core changes.
* Dropped the ECC support for now, will be part of another series if
this patch is accepted.
Boris Brezillon (1):
lib/bch: Allow easy bit swapping
Miquel Raynal (7):
lib/bch: Rework a little bit the exported function names
mtd: rawnand: Ensure the number of bitflips is consistent
mtd: rawnand: Add nand_extract_bits()
MAINTAINERS: Add Arasan NAND controller and bindings
dt-bindings: mtd: Document ARASAN NAND bindings
mtd: rawnand: arasan: Add new Arasan NAND controller
mtd: rawnand: arasan: Support the hardware BCH ECC engine
.../bindings/mtd/arasan,nand-controller.yaml | 63 +
MAINTAINERS | 7 +
drivers/mtd/devices/docg3.c | 10 +-
drivers/mtd/nand/raw/Kconfig | 7 +
drivers/mtd/nand/raw/Makefile | 1 +
drivers/mtd/nand/raw/arasan-nand-controller.c | 1207 +++++++++++++++++
drivers/mtd/nand/raw/nand_base.c | 41 +-
drivers/mtd/nand/raw/nand_bch.c | 10 +-
include/linux/bch.h | 9 +-
include/linux/mtd/rawnand.h | 4 +
lib/bch.c | 148 +-
11 files changed, 1443 insertions(+), 64 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml
create mode 100644 drivers/mtd/nand/raw/arasan-nand-controller.c
--
2.20.1
