| From: |
| Dilip Kota <eswara.kota-AT-linux.intel.com> |
| To: |
| gustavo.pimentel-AT-synopsys.com, lorenzo.pieralisi-AT-arm.com, andrew.murray-AT-arm.com, helgaas-AT-kernel.org, jingoohan1-AT-gmail.com, robh-AT-kernel.org, martin.blumenstingl-AT-googlemail.com, linux-pci-AT-vger.kernel.org, devicetree-AT-vger.kernel.org |
| Subject: |
| [PATCH v5 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file |
| Date: |
| Wed, 6 Nov 2019 11:44:00 +0800 |
| Message-ID: |
| <cover.1572950559.git.eswara.kota@linux.intel.com> |
| Cc: |
| linux-kernel-AT-vger.kernel.org, andriy.shevchenko-AT-intel.com, cheol.yong.kim-AT-intel.com, chuanhua.lei-AT-linux.intel.com, qi-ming.wu-AT-intel.com, Dilip Kota <eswara.kota-AT-linux.intel.com> |
| Archive-link: |
| Article |
Intel PCIe is Synopsys based controller utilizes the DesignWare
framework for host initialization and Intel application
specific register configurations.
Changes on v5:
Add Reviewed-by: Andrew Murray for device tree YAML schema patch.
Address patchv4 review comments.
Sysfs patch work in progress, so not submitted in this patch revision.
Add changes in artpec6 PCI driver to call dw helper function
for programming FTS.
Dilip Kota (3):
dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller
dwc: PCI: intel: PCIe RC controller driver
PCI: artpec6: Configure FTS with dwc helper function
.../devicetree/bindings/pci/intel-gw-pcie.yaml | 138 ++++++
drivers/pci/controller/dwc/Kconfig | 10 +
drivers/pci/controller/dwc/Makefile | 1 +
drivers/pci/controller/dwc/pcie-artpec6.c | 8 +-
drivers/pci/controller/dwc/pcie-designware.c | 57 +++
drivers/pci/controller/dwc/pcie-designware.h | 12 +
drivers/pci/controller/dwc/pcie-intel-gw.c | 538 ++++++++++++++++
include/uapi/linux/pci_regs.h | 1 +
8 files changed, 758 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
create mode 100644 drivers/pci/controller/dwc/pcie-intel-gw.c
--
2.11.0
