Linux in mixed-criticality systems

ARMv6 places some restrictions on page coloring, and actually requires it to an extent when memory is aliased to avoid duplicate entries in the cache. The cache is *virtually* indexed, however, so cache coloring on ARMv6 requires control over the virtual addresses. ARMv7 and ARMv8 both specify physically-indexed and physically-tagged data caches and should have no restrictions on coloring.

You can find more information on the ARMv6 and ARMv7 cache architecture here: https://community.arm.com/processors/b/blog/posts/page-co...