Linux in mixed-criticality systems [LWN.net]

Linux in mixed-criticality systems

Posted Dec 18, 2018 6:31 UTC (Tue) by alison (subscriber, #63752)
Parent article: Linux in mixed-criticality systems

>Memory bandwidth and cache space can be particularly problematic. >One solution for cache contention is to use cache coloring — assigning >virtual addresses so that each cell uses a different portion of the cache.

I've read that ARM and ARM64 don't support cache coloring. If x86_64 is the only arch with this feature then the applicability to embedded use cases may be limited.

If anyone knows contrary information, please speak up!

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Linux in mixed-criticality systems

Posted Dec 18, 2018 16:15 UTC (Tue) by nybble41 (subscriber, #55106) [Link] (1 responses)

ARMv6 places some restrictions on page coloring, and actually requires it to an extent when memory is aliased to avoid duplicate entries in the cache. The cache is *virtually* indexed, however, so cache coloring on ARMv6 requires control over the virtual addresses. ARMv7 and ARMv8 both specify physically-indexed and physically-tagged data caches and should have no restrictions on coloring.

You can find more information on the ARMv6 and ARMv7 cache architecture here: https://community.arm.com/processors/b/blog/posts/page-co...

Linux in mixed-criticality systems

Posted Dec 18, 2018 16:31 UTC (Tue) by alison (subscriber, #63752) [Link]

Thanks, nybble41!