Intel Skylake/Kaby Lake processors: broken hyper-threading

When you think about the nature of the issue (mixed byte and word access specifically involving the high byte of the four registers that have one, in a tight loop), it seems very unlikely that there will be much compiled code that has this particular pattern in it. Indeed, I couldn't find any on a quick scan over my system. On modern x86_64, compilers will be using the %[abcd]l registers if they ever want bytes, because those correspond to the only available byte-chunks of the %r[8-15]l registers. A write to one of the %...h bytes in a tight loop. Can't think of a use-case, myself. Makes me wonder what the OCaml folk were doing with it, to find the pattern.