wait... how do other systems such as APFS and ZFS do acceleration ?
wait... how do other systems such as APFS and ZFS do acceleration ?
Posted Mar 26, 2017 2:00 UTC (Sun) by tytso (✭ supporter ✭, #9993)In reply to: wait... how do other systems such as APFS and ZFS do acceleration ? by johnjones
Parent article: Inline encryption support for block devices
Historically, most accelerators work by sitting on the Host CPU's bus, and talks to the main memory. An example of this is an SHA256 accelerator which sits on the PCIe bus, and checksums data in memory. See the slides from a presentation[1] at the 2014 OpenZFS summit.
[1] http://open-zfs.org/w/images/6/63/Lightning_Talk-Zacodi_L...
What some ARM SOC (system on chip) vendors have done is to put an encryption engine in between the host CPU and the storage device. This isn't actually new; IBM Mainframes can do something similar. Interestingly, one of things ARM CPU's on handsets and Mainframe CPU's is that they tend to be relatively underpowered compared to the rest of the system. So while having a storage-specific accelerator between CPU and storage device is less flexible, it reduces the overhead on the CPU and memory. (For example, an encryption engine which can also be used for IPSEC would read from memory, and then write the ciphertext back to memory --- but then data would have to be sent from memory to the storage or networking device. Compare this architecture with one where you have a crypto engine just for storage, and a different crypto engine just for networking which lives on the NIC.)
I predict that in the future, we'll see this architecture on server platforms. Since we can no longer double the CPU frequency every 18 months, it makes more sense to speed up system by pushing more transistors away from CPU to more specialized hardware accelerators. And if that means specialized crypto engines for storage and networking --- that's just fine.
